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AD7846JP-REEL Fiches technique(PDF) 4 Page - Analog Devices

No de pièce AD7846JP-REEL
Description  LC2MOS 16-Bit Voltage Output DAC
Download  24 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD7846JP-REEL Fiches technique(HTML) 4 Page - Analog Devices

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AD7846
Rev. G | Page 4 of 24
Parameter1
J, A Versions
K, B Versions
Unit
Test Conditions/Comments
DIGITAL OUTPUTS
VOL (Output Low Voltage)
0.4
0.4
V max
ISINK = 1.6 mA
VOH (Output High Voltage)
4.0
4.0
V min
ISOURCE = 400 μA
Floating State Leakage Current
±10
±10
μA max
DB0 to DB15 = 0 to VCC
Floating State Output Capacitance2
10
10
pF max
POWER REQUIREMENTS3
VDD
+11.4/+15.75
+11.4/+15.75
V min/V max
VSS
−11.4/−15.75
−11.4/−15.75
V min/V max
VCC
+4.75/+5.25
+4.75/+5.25
V min/V max
IDD
5
5
mA max
VOUT unloaded
ISS
5
5
mA max
VOUT unloaded
ICC
1
1
mA max
Power Supply Sensitivity4
1.5
1.5
LSB/V max
Power Dissipation
100
100
mW typ
VOUT unloaded
1 Temperature ranges as follows: J, K versions: 0°C to +70°C; A, B versions: −40°C to +85°C.
2 Guaranteed by design and characterization, not production tested.
3 The AD7846 is functional with power supplies of ±12 V. See the Typical Performance Characteristics section.
4 Sensitivity of gain error, offset error, and bipolar zero error to VDD, VSS variations.
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for design guidance and are not subject to test. VREF+ = +5 V; VDD = +14.25 V to +15.75 V; VSS = −14.25 V
to −15.75 V; VCC = +4.75 V to +5.25 V; RIN connected to 0 V, unless otherwise noted.
Table 2.
Parameter
Limit at TMIN to TMAX (All Versions)
Unit
Test Conditions/Comments
Output Settling Time1
6
μs max
To 0.006% FSR, VOUT loaded, VREF− = 0 V, typically 3.5 μs
9
μs max
To 0.003% FSR, VOUT loaded, VREF− = –5 V, typically 6.5 μs
Slew Rate
7
V/μs typ
Digital-to-Analog Glitch
Impulse
70
nV-sec typ
DAC alternately loaded with 10…0000 and 01…1111,
VOUT unloaded
AC Feedthrough
0.5
mV p-p typ
VREF− = 0 V, VREF+ = 1 V rms, 10 kHz sine wave, DAC loaded
with all 0s
Digital Feedthrough
10
nV-sec typ
DAC alternately loaded with all 1s and all 0s. CS high
Output Noise Voltage
Density, 1 kHz to 100 kHz
50
nV/√Hz typ
Measured at VOUT, DAC loaded with 0111011…11,
VREF+ = VREF− = 0 V
1
LDAC = 0. Settling time does not include deglitching time of 2.5 μs (typ).


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