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AD5390BCPZ-3-REEL Fiches technique(PDF) 1 Page - Analog Devices

No de pièce AD5390BCPZ-3-REEL
Description  8-/16-Channel, 3 V/5 V, Serial Input, Single-Supply, 12-/14-Bit Voltage Output
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD5390BCPZ-3-REEL Fiches technique(HTML) 1 Page - Analog Devices

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8-/16-Channel, 3 V/5 V, Serial Input,
Single-Supply, 12-/14-Bit Voltage Output
Data Sheet
AD5390/AD5391/AD5392
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2004–2012 Analog Devices, Inc. All rights reserved.
FEATURES
AD5390: 16-channel, 14-bit voltage output DAC
AD5391: 16-channel, 12-bit voltage output DAC
AD5392: 8-channel, 14-bit voltage output DAC
Guaranteed monotonic
INL
±1 LSB max (AD5391)
±3 LSB max (AD5390-5/AD5392-5)
±4 LSB max (AD5390-3/AD5392-3)
On-chip 1.25 V/2.5 V, 10 ppm/°C reference
Temperature range: −40°C to +85°C
Rail-to-rail output amplifier
Power-down mode
Package types
64-lead LFCSP (9 mm × 9 mm)
52-lead LQFP (10 mm × 10 mm)
User interfaces
Serial SPI-, QSPI-, MICROWIRE-, and DSP-compatible
(featuring data readback)
I2C-compatible interface
Integrated functions
channel monitor
simultaneous output update via LDAC
clear function to user-programmable code
amplifier boost mode to optimize slew rate
user-programmable offset and gain adjust
toggle mode enables square wave generation
thermal monitor
Robust 6.5 kV HBM and 2 kV FICDM ESD rating
APPLICATIONS
Instrumentation and industrial control
Power amplifier control
Level setting (ATE)
Control systems
Microelectromechanical systems (MEMs)
Variable optical attenuators (VOAs)
Optical transceivers (MSA 300, XFP)
FUNCTIONAL BLOCK DIAGRAM
R
DAC 0
R
VOUT 0
DAC
REG
0
14
14
R
DAC 1
R
VOUT 1
VOUT 2
VOUT 3
VOUT 4
VOUT 5
DAC
REG
1
14
14
R
DAC 6
R
VOUT 6
DAC
REG
6
14
14
R
DAC 7
R
VOUT 7
VOUT 8
VOUT 15
DAC
REG
7
14
14
m REG0
c REG0
14
14
14
14
INPUT
REG
0
m REG1
c REG1
14
14
14
14
INPUT
REG
1
m REG6
c REG6
14
14
14
14
INPUT
REG
6
m REG7
c REG7
14
14
14
14
INPUT
REG
7
STATE
MACHINE
AND
CONTROL
LOGIC
INTERFACE
CONTROL
LOGIC
DIN/SDA
DCEN/AD1
SPI/I2C
SCLK/SCL
SYNC/AD0
SDO
1.25V/2.5V
REFERENCE
AD5390
REFOUT/REFIN SIGNAL_GND (×2)
REF_GND
DAC_GND (×2)
AGND (×2)
AVDD (×2)
DGND (×3/×4)
DVDD (×3)
×2
LDAC
POWER-ON
RESET
BUSY
PD
CLR
RESET
MON_IN1
MON_IN2
MON_OUT
VIN0
VIN15
MUX
Figure 1.


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