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AD7705BR-REEL7 Datasheet(Fiches technique) 12 Page - Analog Devices

Numéro de pièce AD7705BR-REEL7
Description  3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs
Télécharger  44 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
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AD7705/AD7706
Rev. C | Page 12 of 44
OUTPUT NOISE (5 V OPERATION)
Table 5 shows the AD7705/AD7706 output rms noise for the
selectable notch and −3 dB frequencies for the parts, as selected
by FS0 and FS1 of the clock register. The numbers given are for
the bipolar input ranges with a VREF of 2.5 V and VDD = 5 V.
These numbers are typical and are generated at an analog input
voltage of 0 V with the parts used in either buffered or unbuffered
mode. Table 6 shows the output peak-to-peak noise for the
selectable notch and −3 dB frequencies for the parts.
Note that these numbers represent the resolution for which
there is no code flicker. They are not calculated based on rms
noise, but on peak-to-peak noise. The numbers given are for
bipolar input ranges with a VREF of 2.5 V for either buffered or
unbuffered mode. These numbers are typical and are rounded
to the nearest LSB. The numbers apply for the CLKDIV bit of
the clock register set to 0.
Table 5. Output RMS Noise vs. Gain and Output Update Rate @ 5 V
Typical Output RMS Noise in μV
Filter First
Notch and
O/P Data Rate
−3 dB
Frequency
Gain of 1
Gain of 2
Gain of 4
Gain of 8
Gain of 16
Gain of 32
Gain of 64
Gain of 128
MCLK IN = 2.4576 MHz
50 Hz
13.1 Hz
4.1
2.1
1.2
0.75
0.7
0.66
0.63
0.6
60 Hz
15.72 Hz
5.1
2.5
1.4
0.8
0.75
0.7
0.67
0.62
250 Hz
65.5 Hz
110
49
31
17
8
3.6
2.3
1.7
500 Hz
131 Hz
550
285
145
70
41
22
9.1
4.7
MCLK IN = 1 MHz
20 Hz
5.24 Hz
4.1
2.1
1.2
0.75
0.7
0.66
0.63
0.6
25 Hz
6.55 Hz
5.1
2.5
1.4
0.8
0.75
0.7
0.67
0.62
100 Hz
26.2 Hz
110
49
31
17
8
3.6
2.3
1.7
200 Hz
52.4 Hz
550
285
145
70
41
22
9.1
4.7
Table 6. Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 5 V
Typical Peak-to-Peak Resolution Bits
Filter First
Notch and
O/P Data Rate
−3 dB
Frequency
Gain of 1
Gain of 2
Gain of 4
Gain of 8
Gain of 16
Gain of 32
Gain of 64
Gain of 128
MCLK IN = 2.4576 MHz
50 Hz
13.1 Hz
16
16
16
16
16
16
15
14
60 Hz
15.72 Hz
16
16
16
16
15
14
14
13
250 Hz
65.5 Hz
13
13
13
13
13
13
12
12
500 Hz
131 Hz
10
10
10
10
10
10
10
10
MCLK IN = 1 MHz
20 Hz
5.24 Hz
16
16
16
16
16
16
15
14
25 Hz
6.55 Hz
16
16
16
16
15
14
14
13
100 Hz
26.2 Hz
13
13
13
13
13
13
12
12
200 Hz
52.4 Hz
10
10
10
10
10
10
10
10




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