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AD7621ASTRL Datasheet(Fiches technique) 17 Page - Analog Devices

Numéro de pièce AD7621ASTRL
Description  16-Bit, 2 LSB INL, 3 MSPS PulSAR® ADC
Télécharger  32 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
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AD7621
Rev. 0 | Page 17 of 32
TYPICAL CONNECTION DIAGRAM
Figure 23 shows a typical connection diagram for the AD7621.
Different circuitry from that shown in this diagram are optional
and are discussed below.
ANALOG INPUTS
Figure 24 shows an equivalent circuit of the input structure of
the AD7621.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs, IN+ and IN−. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 0.3 V as this causes the diodes to become forward-biased
and start conducting current. These diodes can handle a
forward-biased current of 100 mA maximum. For instance,
these conditions could eventually occur when the input buffer’s
U1 or U2 supplies are different from AVDD. In such a case, an
input buffer with a short-circuit current limitation can be used
to protect the part.
D1
RIN
CIN
D2
IN+ OR IN–
AGND
AVDD
CPIN
Figure 24. AD7621 Simplified Analog Input.
The analog input of AD7621 is a true differential structure. By
using this differential input, small signals common to both
inputs are rejected, as shown in Figure 25, representing the
typical CMRR over frequency with internal and external
references.
FREQUENCY (kHz)
45
75
70
65
60
55
50
1
10
100
1k
10k
EXT REF
INT REF
Figure 25. Analog Input CMRR vs. Frequency
During the acquisition phase for ac signals, the impedance of
the analog inputs, IN+ and IN−, can be modeled as a parallel
combination of Capacitor CPIN and the network formed by the
series connection of RIN and CIN. CPIN is primarily the pin
capacitance. RIN is typically 350 Ω and is a lumped component
comprised of some serial resistors and the on resistance of the
switches. CIN is typically 12 pF and is mainly the ADC sampling
capacitor. During the conversion phase, when the switches are
opened, the input impedance is limited to CPIN. RIN and CIN
make a one-pole, low-pass filter that has a typical −3 dB cutoff
frequency of 50 MHz, thereby reducing an undesirable aliasing
effect while limiting noise from the inputs.
Since the input impedance of the AD7621 is very high, the
AD7621 can be directly driven by a low impedance source
without gain error. To further improve the noise filtering
achieved by the AD7621 analog input circuit, an external, one-
pole RC filter between the amplifier’s outputs and the ADC
analog inputs can be used, as shown in Figure 23. However,
large source impedances significantly affect the ac performance,
especially total harmonic distortion (THD). The maximum
source impedance depends on the amount of THD that can be
tolerated. The THD degrades as a function of the source
impedance and the maximum input frequency, as shown in
Figure 26.
INPUT FREQUENCY (kHz)
–105
–60
–65
–70
–75
–80
–85
–90
–95
–100
1
10
100
1k
RS = 500Ω
RS = 50Ω
RS = 100Ω
RS = 10Ω
PDBUF = PDREF = LOW
Figure 26. THD vs. Analog Input Frequency and Source Resistance
DRIVER AMPLIFIER CHOICE
Although the AD7621 is easy to drive, the driver amplifier
needs to meet the following requirements:
Together, the driver amplifier and the AD7621 analog
input circuit must be able to settle for a full-scale step of
the capacitor array at a 16-bit level (0.0015%). In the
amplifier data sheet, settling at 0.1% to 0.01% is more
commonly specified. This could differ significantly from
the settling time at a 16-bit level and should be verified
prior to driver selection. The AD8021 op amp, which
combines ultralow noise and high gain bandwidth, meets
this settling time requirement even when used with gains
up to 13.
The noise generated by the driver amplifier needs to be
kept as low as possible in order to preserve the SNR and
transition noise performance of the AD7621. The noise




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