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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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AD5340BRUZ-REEL1 Fiches technique(PDF) 17 Page - Analog Devices |
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AD5340BRUZ-REEL1 Fiches technique(HTML) 17 Page - Analog Devices |
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17 / 28 page  AD5330/AD5331/AD5340/AD5341 Rev. A | Page 17 of 28 THEORY OF OPERATION The AD5330/AD5331/AD5340/AD5341 are single resistor- string DACs fabricated on a CMOS process with resolutions of 8, 10, and 12 bits, respectively. They are written to using a parallel interface. They operate from single supplies of 2.5 V to 5.5 V and the output buffer amplifiers offer rail-to-rail output swing. The AD5330, AD5340, and AD5341 have a reference input that can be buffered to draw virtually no current from the reference source. The reference input of the AD5331 is unbuffered. The devices have a power-down feature that reduces current consumption to only 80 nA @ 3 V. DIGITAL-TO-ANALOG SECTION The architecture of one DAC channel consists of a reference buffer and a resistor-string DAC followed by an output buffer amplifier. The voltage at the VREF pin provides the reference voltage for the DAC. Figure 36 shows a block diagram of the DAC architecture. Because the input coding to the DAC is straight binary, the ideal output voltage is given by Gain D V V N REF OUT × × = 2 where: D is the decimal equivalent of the binary code, which is loaded to the DAC register: 0 to 255 for AD5330 (8 Bits) 0 to 1023 for AD5331 (10 Bits) 0 to 4095 for AD5340/AD5341 (12 Bits) N is the DAC resolution. Gain is the output amplifier gain (1 or 2). GAIN VREF VOUT BUF DAC REGISTER INPUT REGISTER RESISTOR STRING OUTPUT BUFFER AMPLIFIER REFERENCE BUFFER Figure 36. Single DAC Channel Architecture RESISTOR STRING The resistor-string section is shown in Figure 37. It is simply a string of resistors, each of value R. The digital code loaded to the DAC register determines at what node on the string the voltage is tapped off to be fed into the output amplifier. The voltage is tapped off by closing one of the switches connecting the string to the amplifier. Because it is a string of resistors, it is guaranteed monotonic. TO OUTPUT AMPLIFIER R R R R R VREF Figure 37. Resistor String DAC REFERENCE INPUT There is a reference input pin for the DAC. The reference input is buffered on the AD5330, AD5340, and AD5341 but can be configured as unbuffered also. The reference input of the AD5331 is unbuffered. The buffered/unbuffered option is controlled by the BUF pin. In buffered mode (BUF = 1), the current drawn from an external reference voltage is virtually zero because the impedance is at least 10 MΩ. The reference input range is 1 V to 5 V with a 5 V supply. In unbuffered mode (BUF = 0), the user can have a reference voltage as low as 0.25 V and as high as VDD because there is no restriction due to headroom and footroom of the reference amplifier. The impedance is still large at typically 180 kΩ for 0 V to VREF mode and 90 kΩ for 0 V to 2 × VREF mode. If there is an external buffered reference (for example, REF192), there is no need to use the on-chip buffer. OUTPUT AMPLIFIER The output buffer amplifier is capable of generating output voltages to within 1 mV of either rail. Its actual range depends on VREF, GAIN, the load on VOUT, and offset error. If a gain of 1 is selected (GAIN = 0), the output range is 0.001 V to VREF. If a gain of 2 is selected (GAIN = 1), the output range is 0.001 V to 2 × VREF. However, because of clamping, the maximum output is limited to VDD – 0.001 V. The output amplifier is capable of driving a load of 2 kΩ to GND or 2 kΩ to VDD in parallel with 500 pF to GND or 500 pF to VDD. The source and sink capabilities of the output amplifier can be seen in Figure 24. The slew rate is 0.7 V/μs with a half-scale settling time to ±0.5 LSB (at eight bits) of 6 μs with the output unloaded (see Figure 29). |
Numéro de pièce similaire - AD5340BRUZ-REEL1 |
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Description similaire - AD5340BRUZ-REEL1 |
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