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AD5421BREZ-REEL Datasheet(Fiches technique) 8 Page - Analog Devices

Numéro de pièce AD5421BREZ-REEL
Description  16-Bit, Serial Input, Loop-Powered, 4 mA to 20 mA DAC
Télécharger  36 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
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AD5421
Data Sheet
Rev. F | Page 8 of 36
Loop voltage = 24 V; REFIN = REFOUT1 (2.5 V internal reference); RL = 250 Ω; external NMOS connected; all loop current ranges;
all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter1, 2
C Grade
Unit
Test Conditions/Comments
Min
Typ
Max
ACCURACY, INTERNAL RSET
Total Unadjusted Error (TUE)3
−0.157
+0.157
% FSR
−0.117
±0.0172
+0.117
% FSR
TA = 25°C
Relative Accuracy (INL)
−0.004
+0.004
% FSR
−0.004
±0.0015
+0.004
% FSR
TA = 25°C
Offset Error
−0.04
+0.04
% FSR
−0.025
±0.0025
+0.025
% FSR
TA = 25°C
Offset Error TC
1
ppm FSR/°C
Gain Error
−0.128
+0.128
% FSR
−0.093
±0.0137
+0.093
% FSR
TA = 25°C
Gain Error TC
5
ppm FSR/°C
Full-Scale Error
−0.157
+0.157
% FSR
−0.117
±0.0172
+0.117
% FSR
TA = 25°C
Full-Scale Error TC
6
ppm FSR/°C
ACCURACY, EXTERNAL RSET (24 kΩ)
Assumes ideal resistor
Total Unadjusted Error (TUE)3
−0.133
+0.133
% FSR
−0.133
±0.0252
+0.133
% FSR
TA = 25°C
Relative Accuracy (INL)
−0.004
+0.004
% FSR
−0.004
±0.0015
+0.004
% FSR
TA = 25°C
Offset Error
−0.029
+0.029
% FSR
−0.029
±0.0038
+0.029
% FSR
TA = 25°C
Offset Error TC
0.5
ppm FSR/°C
Gain Error
−0.11
+0.11
% FSR
−0.106
±0.0197
+0.106
% FSR
TA = 25°C
Gain Error TC
2
ppm FSR/°C
Full-Scale Error
−0.133
+0.133
% FSR
−0.133
±0.0252
+0.133
% FSR
TA = 25°C
Full-Scale Error TC
2
ppm FSR/°C
1
Temperature range: −40°C to +105°C; typical at +25°C.
2
Specifications guaranteed by design and characterization; not production tested.
3
Total unadjusted error is the total measured error (offset error + gain error + linearity error + output drift over temperature) after factory calibration of the AD5421.
System level total error can be reduced using the offset and gain registers.




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