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AD5421BREZ-REEL Datasheet(Fiches technique) 3 Page - Analog Devices

Numéro de pièce AD5421BREZ-REEL
Description  16-Bit, Serial Input, Loop-Powered, 4 mA to 20 mA DAC
Télécharger  36 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
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Data Sheet
AD5421
Rev. F | Page 3 of 36
REVISION HISTORY
1/13—Rev. E to Rev. F
Moved Revision History Section.....................................................3
Change to Table 7............................................................................11
Changes to Table 8 ..........................................................................13
Changes to On-Chip ADC Section...............................................23
Changes to Table 19 and On-Chip ADC Transfer Function
Equations Section............................................................................29
7/12—Rev. D to Rev. E
Changes to Figure 1 and Companion Products Section ..............1
Changes to Pin LOOP− Description ............................................12
Changes to Applications Information Section and Figure 49 ...31
Added Figure 50 ..............................................................................32
5/12—Rev. C to Rev. D
Changes to Features Section and Applications Section; Added
Companion Products Section..........................................................1
Changes to Line Regulation Parameter, Table 1............................5
Updated Outline Dimensions........................................................33
12/11—Rev. B to Rev. C
Change to REFOUT1 Pin, Capacitive Load Parameter, Test
Conditions, Table 1 ...........................................................................4
Change to REGOUT Output, Capacitive Load Parameter, Test
Conditions, Table 1 ...........................................................................5
Changes to ESD Parameter, Table 6..............................................10
12/11—Rev. A to Rev. B
Added 32-Lead LFCSP ...................................................... Universal
Changes to the Specifications Section, Table 1 .............................3
Changes to Table 7 ..........................................................................10
Added Figure 5, Renumbered Sequentially.................................11
Changes to Table 8 ..........................................................................11
Changes to Figure 33 ......................................................................17
Changes to the On-Chip ADC Section........................................22
Changes to Figure 46 ......................................................................23
Changes to Figure 48 ......................................................................24
Changes to the Register Readback Section..................................25
Updated Outline Dimensions........................................................33
Changes to Ordering Guide...........................................................34
5/11—Rev. 0 to Rev. A
Changes to REGIN, REFOUT1, and REFOUT2 Pin Descriptions
in Table 8 ..........................................................................................10
Change to Figure 45........................................................................22
Changes to Input Shift Register Section, Table 11, and Register
Readback Section ............................................................................24
Changes to Figure 48 ......................................................................30
2/11—Revision 0: Initial Version




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