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AD5311BRM-REEL7 Datasheet(Fiches technique) 7 Page - Analog Devices

Numéro de pièce AD5311BRM-REEL7
Description  2.5 V to 5.5 V, 120 μA, 2-Wire Interface, Voltage-Output 8-/10-/12-Bit DACs
Télécharger  24 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
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AD5301/AD5311/AD5321
Rev. B | Page 7 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
A0
PD
VOUT
GND
VDD
SCL
SDA
A1
AD5301/
AD5311/
AD5321
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
GND
SDA
SCL
VDD
A0
VOUT
AD5301/
AD5311/
AD5321
1
2
3
6
5
4
TOP VIEW
(Not to Scale)
Figure 3. 8-Lead MSOP
(RM-8) Pin Configuration
Figure 4. 6-Lead SOT-23
(RJ-6) Pin Configuration
Table 5. Pin Function Descriptions
MSOP
Pin No.
SOT-23
Pin No.
Mnemonic
Description
1
6
VDD
Power Supply Input. These parts can be operated from 2.5 V to 5.5 V and the supply should be decoupled
with a 10 μF in parallel with a 0.1 μF capacitor to GND.
2
5
A0
Address Input. Sets the least significant bit of the 7-bit slave address.
3
N/A
A1
Address Input. Sets the second least significant bit of the 7-bit slave address.
4
4
VOUT
Buffered Analog Output Voltage from the DAC. The output amplifier has rail-to-rail operation.
5
N/A
PD
Active Low Control Input. Acts as a hardware power-down option. This pin overrides any software
power-down option. The DAC output goes three-state and the current consumption of the part
drops to 50 nA @ 3 V (200 nA @ 5 V).
6
3
SCL
Serial Clock Line. This is used in conjunction with the SDA line to clock data into the 16-bit input shift
register. Clock rates of up to 400 kbps can be accommodated in the I2C-compatible interface. SCL may
be CMOS/TTL driven.
7
2
SDA
Serial Data Line. This is used in conjunction with the SCL line to clock data into the 16-bit input shift
register during the write cycle and to read back one or two bytes of data (one byte for the AD5301,
two bytes for the AD5311/AD5321) during the read cycle. It is a bidirectional open-drain data line that
should be pulled to the supply with an external pull-up resistor. If not used in readback mode, SDA may
be CMOS/TTL driven.
8
1
GND
Ground Reference Point for All Circuitry on the Part.




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