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AD830JR-REEL Fiches technique(PDF) 14 Page - Analog Devices

No de pièce AD830JR-REEL
Description  High Speed, Video Difference Amplifier
Download  20 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD830JR-REEL Fiches technique(HTML) 14 Page - Analog Devices

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AD830
Rev. C | Page 14 of 20
Driving Cap Loads
The AD830 is capable of driving modest sized capacitive loads
while maintaining its rated performance. Several curves of
bandwidth versus capacitive load are given in Figure 34 and
Figure 37. The AD830 was designed primarily as a low
distortion video speed amplifier but with a trade-off, for
example, giving up very large capacitive load driving capability.
If very large capacitive loads must be driven, the network shown
in Figure 32 should be used to ensure stable operation. If the
loss of gain caused by the resistor, RS, in series with the load is
objectionable, the optional feedback network shown may be
added to restore the lost gain.
+VS
VOUT
RS
36.5
*OPTIONAL
FEEDBACK
NETWORK
–VS
AD830
1
2
3
4
8
7
6
5
A = 1
GM
GM
C
0.1µF
0.1µF
C1
100pF
RS
R2
R1
1k
INPUT
SIGNAL
VCM
ZCM
Figure 32. Circuit for Driving Large Capacitive Loads
FREQUENCY (Hz)
3
10k
–27
100k
1M
10M
100M
±15V
±5V
–24
–21
–18
–15
–12
–9
–6
–3
0
Figure 33. Closed-Loop Response vs. Frequency with 100 pF Load and Series
Resistor Compensation
SUPPLIES, BYPASSING, AND GROUNDING
(FIGURE 34)
The AD830 is capable of operating over a wide range of supply
voltages, both single and dual supplies. The coupling may be dc
or ac, provided the input and output voltages stay within the
specified common-mode voltage limits. For dual supplies, the
device works from ±4 V to ±16.5 V. Single-supply operation is
possible over 8 V to 33 V. It is also possible to operate the part
with split-supply voltages, for example, +24 V or −5 V for
special applications such as level shifting. The primary
constraint is that the total potential between the two supplies
does not exceed 33 V.
Inclusion of power supply bypassing capacitors is necessary to
achieve stable behavior and the specified performance. It is
especially important when driving low resistance loads. At
minimum, connect a 0.1 μF ceramic capacitor at the supply lead
of the AD830 package. In addition, for the best bypassing, it is
best to connect a 0.01 μF ceramic capacitor and 4.7 μF tantalum
capacitor to the supply lead going to the AD830.
0.1µF
0.01µF
VP
AND
VN
VP
AND
VN
4.7µF
LOAD
GND
LEAD
LOAD
GND
LEAD
Figure 34. Supply Decoupling Options
The AD830 is designed to be capable of rejecting noise and
dissimilar potentials in the ground lines. Therefore, proper
care is necessary to realize the benefits of the differential
amplification of the part. Separation of the input and output
grounds is crucial in rejection of the common-mode noise at
the inputs and eliminating any ground drops on the input signal
line. For example, connecting the ground of a coaxial cable to
the AD830 output common (board ground) could degrade the
CMR and also introduce power-down loading on cable grounds.
However, it is also necessary as in any electronic system to
provide a return path for bias currents back to their original
power supply. This is accomplished by providing a connection
between the differing grounds through a modest impedance
labeled ZCM, for example, 100 Ω.
Single-Supply Operation
The AD830 is capable of operating in single power supply
applications down to a voltage of 8 V, with the generalized
connection shown in Figure 35. There is a constraint on the
common-mode voltage at the input and output that establishes
the range for these voltages. Direct coupling may be used for
input and output voltages that lie in these ranges. Any gain
network applied needs to be referred to the output common
connection or have an appropriate offset voltage. In situations
where the signal lies at a common voltage outside the common-
mode range of the AD830, direct coupling does not work, so ac
coupling should be used. Figure 47 shows how to easily
accomplish coupling to the AD830. For single-supply operation
where direct coupling is desired, the input and output common-
mode curves (Figure 36 and Figure 37) should be used.


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