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UC28023DWR Fiches technique(PDF) 4 Page - Texas Instruments |
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UC28023DWR Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 19 page UC28023 UC28025 SLUS557F -- MARCH 2003 -- REVISED AUGUST 2010 4 www.ti.com ELECTRICAL CHARACTERISTICS TA =--40°C to 105°C,TJ =TA, RT =3.65kΩ,CT =1nF,VCC = 15 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT REFERENCE VREF Reference voltage TJ =25°C, IREF =1mA 5.05 5.10 5.15 V Line regulation voltage 10 V ≤ VCC ≤ 30 V 2 15 mV Load regulation voltage 1mA ≤ IREF ≤ 10 mA 5 15 mV Temperature stability(1) T(min) <TA <T(max) 0.2 0.4 mV/°C Total output voltage variation(1) Line, load, temperature 4.95 5.25 V Output noise voltage(1) 10 Hz <f<10kHz 50 μV Long term stability voltage(1) TJ = 125°C, 1000 hours 5 25 mV ISS Short circuit current VREF =0V --20 --50 --100 mA OSCILLATOR fOSC Initial accuracy(1) TJ =25°C 360 400 440 kHz Voltage stability(1) 10 V ≤ VCC ≤ 30 V 0.2% 2.0% Temperature stability(1) T(min) <TA <T(max) 5% Total voltage variation(1) Line, temperature 340 460 kHz VCLOCK_H High-level clock output voltage 3.9 4.5 VCLOCK_L Low-level clock output voltage 2.3 2.9 VRAMP(p) Ramp peak voltage(1) 2.6 2.8 3.0 V VRAMP(v) Ramp valley voltage(1) 0.70 1.00 1.25 V VRAMP(v-p) Ramp vally-to-peak voltage(1) 1.6 1.8 2.0 ERROR AMPLIFIER VIN Input offset voltage 15 mV IBIAS Input bias current 0.6 3.0 A IIN Input offset current 0.1 1.0 μA AVOL Open loop gain 1V ≤ VOUT ≤ 4V 60 95 CMRR Common mode rejection ratio 1.5 V ≤ VCM ≤ 5.5 V 75 95 dB PSRR Power supply rejection ratio 10 V ≤ VCC ≤ 30 V 85 110 dB IOUT(sink) Output sink current V(EAOUT) =1 V 1.0 2.5 mA IOUT(src) Output source current V(EAOUT) =4 V --0.5 --1.3 mA VOH High-level output voltage I(EAOUT) =--0.5 mA 4.0 4.7 5.0 V VOL Low-level output voltage I(EAOUT) =1 mA 0 0.5 1.0 V Unity gain bandwidth(1) 3.0 5.5 MHz Slew rate(1) 6 12 V/μs PWM COMPARATOR IBIAS RAMP bias current VRAMP =0 V --1 --5 μA Maximum duty cycle UC28023 80% 90% Maximum duty cycle UC28025 (2) 40% 45% Minimum duty cycle UC28023 0% Minimum duty cycle UC28025 0% EAOUT zero DC threshold VRAMP =0 V 1.10 1.25 1.40 V tDELAY Delay to output time(1) 50 100 ns (1) Ensured by design. Not production tested. (2) Tested as 80% minimum for the oscillator which is the equivalent of 40% for UC28025. |
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Description similaire - UC28023DWR |
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