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UC2902 Fiches technique(PDF) 6 Page - Texas Instruments

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No de pièce UC2902
Description  LOAD SHARE CONTROLLER
Download  10 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

UC2902 Fiches technique(HTML) 6 Page - Texas Instruments

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UC2902
UC3902
SLUS232E − DECEMBER 19, 2002 − REVISED JULY 2011
6
www.ti.com
APPLICATION INFORMATION
The values of five passive components must be determined to configure the UC3902 load share controller. The
output and return lines of each converter are connected together at the load, with current sense resistor RSENSE
inserted in each negative return line. Another resistor, RADJ, is also inserted in each positive remote sense line.
The differential share bus terminals (SHARE+ and SHARE−) of each UC3902 are connected together
respectively, and the SHARE− node is also connected to the system ground. A typical application is illustrated
in Figure 1.
The load share controller design can be executed by following the next few steps:
Step 1.
RSENSE +
VSHARE(max)
ACSA IO(max)
D where ACSA is 40, the gain of the current sense amplifier
At full load, the voltage drop across the RSENSE resistor is IO(max) × RSENSE. Taking into account the gain of the
current sense amplifier, the voltage at full load on the current share bus,
VSHARE(max) +
ACSA IO(max)
RSENSE
This voltage must stay 1.5-V below VCC or below 10 V whichever is smaller. VSHARE represents an upper limit
but the designer should select the full scale share bus voltage keeping in mind that every volt on the load share
bus increases the master controller’s supply current by approximately 100 μA times the number of slave units
connected parallel.
Step 2.
RG +
VADJ(max)
IADJ(max)
Care must be taken to ensure that IADJ(max) is low enough so that both the drive current and power dissipation
are within the device’s capability. For most applications, an IADJ(max) current between 5 mA and 10 mA is
acceptable. In a typical application, a 360-Ω RG resistor from the ADJR pin to ground sets IADJ(max) to
approximately 5 mA.
Step 3.
RADJ +
DVO(max) * IO(max) RSENSE
IADJ(max)
RADJ must be low enough to not affect the normal operation of the converter’s voltage feedback loop. Typical
RADJ values are between 20 Ω to100 Ω depending on VO, ΔVO(max) and the selected IADJ(max) value.
Step 4.
CC +
gM
2p
fC
RADJ
RG
RSENSE
RLOAD
ACSA APWR fC
(1)
(2)
(3)
(4)
(5)


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