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UC2879J Fiches technique(PDF) 5 Page - Texas Instruments |
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UC2879J Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 15 page www.ti.com (2) Phase shift percentage (0% = 0 , 100% = 180 ) is defined as 200 % T q = f UC1879 UC2879 UC3879 SLUS230B – JUNE 1998 – REVISED JUNE 2007 ELECTRICAL CHARACTERISTICS (continued) Unless specified; VC = VIN = V UVSEL = 12 V, CT = 470 pF, RT = 9.53k, RDELSETA-B = RDELSEC-D = 4.8k, CDELSETA-B = CDELSETC-D = 0.01 µF, T A = TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PWM Comparator RAMP offset voltage TJ = 25°C(1) 1.1 1.25 1.4 V VCOMP> VRAMPpeak+ VRAMPoffset 98% 99.7% 102% PWM phase shift, TDELSETA-B, TDELSETC-D = 0(2) VCOMP < Zero Phase Shift Voltage 0% 0.3% 2% VCOMP> VRAMPpeak + VRAMPoffset 10 Output skew, TDELSETA-B, TDELSETC-D = 0(2) VCOMP < Zero Phase Shift Voltage 10 ns UC3879, UC2879 115 250 Ramp to output delay, TDELSETA-B = 0, TDELSETC-D = 0 UC1879 115 300 Oscillator Initial accuracy TA = 25°C 180 200 220 kHz Voltage stability 11 V < VIN < 18 V 1 2 % Total variation Line, Temperature 160 200 240 kHz CLKSYNC threshold 2.3 2.5 2.7 Clock out high 2.8 4 V Clock out low 0.5 1 1.5 Clock out pulse width 400 600 ns Ramp valley voltage 0.2 0.4 V Ramp peak voltage 2.8 2.9 3.2 Current Limit Input bias VCS = 3 V 2 10 µA Threshold voltage 2.35 2.5 2.65 V Delay to OUTA, B, C, D 160 300 ns Cycle-by-Cycle Current Limit Input bias VCS = 2.2 V 2 10 µA Threshold voltage 1.85 2 2.15 V Delay to output zero phase 110 300 ns (1) Ramp offset voltage has a temperature coefficient of about –4 mV/ °C. where is the phase shift, and and T are defined in Figure 1. At 0% phase shift, is the output skew. 5 Submit Documentation Feedback |
Numéro de pièce similaire - UC2879J |
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Description similaire - UC2879J |
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