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DM81LS96 Fiches technique(PDF) 4 Page - Fairchild Semiconductor |
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DM81LS96 Fiches technique(HTML) 4 Page - Fairchild Semiconductor |
4 / 7 page www.fairchildsemi.com 4 DC Electrical Characteristics DM81LS95A and DM81LS97A over recommended operating free air temperature range (unless otherwise noted) Note 3: All typicals are at VCC = 5V, TA = 25°C. Note 4: Both G inputs are at 2V. Note 5: Both G inputs are at 0.4V. Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second. AC Electrical Characteristics DM81LS95A and DM81LS97A VCC = 5V, TA = 25°C Note 7: CL = 5 pF. Symbol Parameter Conditions Min Typ Max Units (Note 3) VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V VOH HIGH Level Output Voltage VCC = Min, IOH = Max 2.7 V VIL = Max, VIH = Min VOL LOW Level Output Voltage VCC = Min, IOL = Max 0.5 V IOL = Max, VIH = Min IOL = 12 mA, VCC = Min 0.4 II Input Current @ Max VCC = Max, VI = 7V 0.1 mA Input Voltage IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA IIL LOW Level Input Current VCC = Max VI = 0.5V A (Note 4) −20 µA VI = 0.4V A (Note 5) −50 G −50 IOZH Off-State Output Current VCC = Max, VO = 2.4V 20 µA with HIGH Level Output VIH = Min, VIL = Max Voltage Applied IOZL Off-State Output Current VCC = Max, VO = 0.4V −20 µA with LOW Level Output VIH = Min, VIL = Max Voltage Applied IOS Short Circuit VCC = Max −20 −100 mA Output Current (Note 6) ICC Supply Current VCC = Max (Note 4) 16 26 mA Symbol Parameter RL = 667 Ω Units CL = 50 pF CL = 150 pF Min Max Min Max tPLH Propagation Delay Time 16 25 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time 28 40 ns HIGH-to-LOW Level Output tPZH Output Enable Time 25 30 ns to HIGH Level Output tPZL Output Enable Time 30 42 ns to LOW Level Output tPHZ Output Disable Time 20 ns from HIGH Level Output (Note 7) tPLZ Output Disable Time 27 ns from LOW Level Output (Note 7) |
Numéro de pièce similaire - DM81LS96 |
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Description similaire - DM81LS96 |
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