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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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DM93L14 Fiches technique(PDF) 2 Page - Fairchild Semiconductor |
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DM93L14 Fiches technique(HTML) 2 Page - Fairchild Semiconductor |
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2 / 5 page  www.fairchildsemi.com 2 Functional Description The DM93L14 consists of four latches with a common active LOW Enable input and active LOW Master Reset input. When the Enable goes HIGH, data present in the latches is stored and the state of the latch is no longer affected by the Sn and Dn inputs. the Master Reset when activated overrides all other input conditions forcing all latch outputs LOW. Each of the four latches can be oper- ated in one of two modes: D-TYPE LATCH—For D-type operation the S input of a latch is held LOW. While the common Enable is active the latch output follows the D input. Information present at the latch output is stored in the latch when the Enable goes HIGH. SET/RESET LATCH—During set/reset operation when the common Enable is LOW a latch is reset by a LOW on the D input, and can be set by a LOW on the S input if the D input is HIGH. If both S and D inputs are LOW, the D input will dominate and the latch will be reset. When the Enable goes HIGH, the latch remains in the last state prior to dis- ablement. The two modes of latch operation are shown in the Truth Table. Truth Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Qn−1 = Previous Output State Qn = Present Output State Logic Diagram MR E D S Qn Operation H L LLL D Mode HL HL L HH X X Qn-1 H L LLL R/S Mode HL HL H HL L H L HL H H Qn-1 HH X X Qn-1 L X X X L RESET |
Numéro de pièce similaire - DM93L14 |
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Description similaire - DM93L14 |
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