www.fairchildsemi.com

8

DM74LS163A Switching Characteristics

Note 14: The propagation delay clear to output is measured from the clock input transition.

From (Input)

Symbol

Parameter

To (Output)

Units

Min

Max

Min

Max

Maximum Clock Frequency

25

20

MHz

Propagation Delay Time

Clock to

25

30

ns

LOW-to-HIGH Level Output

Ripple Carry

Propagation Delay Time

Clock to

30

38

ns

HIGH-to-LOW Level Output

Ripple Carry

Propagation Delay Time

Clock to Any Q

22

27

ns

LOW-to-HIGH Level Output

(Load HIGH)

Propagation Delay Time

Clock to Any Q

27

38

ns

HIGH-to-LOW Level Output

(Load HIGH)

Propagation Delay Time

Clock to Any Q

24

30

ns

LOW-to-HIGH Level Output

(Load LOW)

Propagation Delay Time

Clock to Any Q

27

38

ns

HIGH-to-LOW Level Output

(Load LOW)

Propagation Delay Time

Enable T to

14

27

ns

LOW-to-HIGH Level Output

Ripple Carry

Propagation Delay Time

Enable T to

15

27

ns

HIGH-to-LOW Level Output

Ripple Carry

Propagation Delay Time

Clear to Any Q

28

45

ns

HIGH-to-LOW Level Output

(Note 14)