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DM74ALS20AN Fiches technique(PDF) 1 Page - Fairchild Semiconductor |
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DM74ALS20AN Fiches technique(HTML) 1 Page - Fairchild Semiconductor |
1 / 4 page © 2000 Fairchild Semiconductor Corporation DS006184 www.fairchildsemi.com October 1986 Revised February 2000 DM74ALS20A Dual 4-Input NAND Gate General Description This device contains two independent gates, each of which performs the logic NAND function. Features s Switching specifications at 50 pF s Switching specifications guaranteed over full tempera- ture and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart s Improved AC performance over Schottky and low power Schottky counterparts Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = ABCD H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level Order Number Package Number Package Description DM74ALS20AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74ALS20AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Inputs Output AB CD Y XXX L H XX L X H XL X X H L XXX H HH HH L |
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