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CD4512BCN Fiches technique(PDF) 1 Page - Fairchild Semiconductor |
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CD4512BCN Fiches technique(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page October 1987 Revised January 1999 © 1999 Fairchild Semiconductor Corporation DS005993.prf www.fairchildsemi.com CD4512BC 8-Channel Buffered Data Selector General Description The CD4512BC buffered 8-channel data selector is a com- plementary MOS (CMOS) circuit constructed with N- and P-channel enhancement mode transistors. This data selec- tor is primarily used as a digital signal multiplexer selecting 1 of 8 inputs and routing the signal to a 3-STATE output. A high level at the Inhibit input forces a low level at the out- put. A high level at the Output Enable (OE) input forces the output into the 3-STATE condition. Low levels at both the Inhibit and (OE) inputs allow normal operation. Features s Wide supply voltage range: 3.0V to 15V s High noise immunity: 0.45 VDD (typ.) s 3-STATE output s Low quiescent power dissipation: 0.25 µW/package (typ.) @ V CC = 5.0V s Plug-in replacement for Motorola MC14512 Ordering Code: Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering code. Connection Diagram Pin Assignments for SOIC and DIP Top View Truth Table 2 = Don't care Hi-Z = 3-STATE condition Xn = Data at input n Order Number Package Number Package Description CD4512BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body CD4512BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Address Inputs Control Inputs Output C B A Inhibit OE Z 00 0 0 0 X0 00 1 0 0 X1 0 1 0 0 0 X2 01 1 0 0 X3 10 0 0 0 X4 10 1 0 0 X5 1 1 0 0 0 X6 11 1 0 0 X7 21 1 1 0 0 2 2 2 2 1 Hi-Z |
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