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2

Unit Loading/Fan Out

Functional Description

The 74F352 is a dual 4-input multiplexer. It selects two bits

of data from up to four sources under the control of the

can be used to strobe the outputs independently. When the

are shown below:

The 74F352 can be used to move data from a group of reg-

isters to a common output bus. The particular register from

which the data came would be determined by the state of

the Select inputs. A less obvious application is as a func-

tion generator. The 74F352 can generate two functions of

three variables. This is useful for implementing highly irreg-

ular random logic.

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Pin Names

Description

U.L.

HIGH/LOW

Side A Data Inputs

1.0/1.0

20

µA/−0.6 mA

Side B Data Inputs

1.0/1.0

20

µA/−0.6 mA

Common Select Inputs

1.0/1.0

20

µA/−0.6 mA

Side A Enable Input (Active LOW)

1.0/1.0

20

µA/−0.6 mA

Side B Enable Input (Active LOW)

1.0/1.0

20

µA/−0.6 mA

Multiplexer Outputs (Inverted)

50/33.3

−1 mA/20 mA