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AD8362-EVAL Datasheet(Fiches technique) 29 Page - Analog Devices

Numéro de pièce AD8362-EVAL
Description  50 Hz to 2.7 GHz 60 dB TruPwr™ Detector
Télécharger  36 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
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AD8362
Rev. B | Page 29 of 36
GENERAL APPLICATIONS
The unusual versatility of the AD8362 opens up many new
possibilities whenever an element having an accurate rms
response is needed. Developed primarily to address the need for
true power measurement in communications systems operating
at frequencies as high as 2.7 GHz, the AD8362 is capable of
meeting the requirements of instrumentation at much lower
frequencies. As noted earlier, the AD8362 is unique in providing
rms-to-dc conversion with a completely constant bandwidth
regardless of signal amplitude and in providing a calibrated
linear-in-dB measurement.
Caution: The applications shown in Figure 61 are provided only
for illustrative purposes and should not be regarded as ready for
immediate incorporation into a user’s system. They have been
validated for the present purpose by simulation studies.
RMS VOLTMETER WITH >100 dB DYNAMIC RANGE
The 60 dB range of the AD8362 can be extended by adding a
standalone VGA as a preamplifier whose gain control input is
derived directly from VOUT. This extends the dynamic range
by the gain control range of this second amplifier. When this
VGA also provides a linear-in-dB (exponential) gain control
function, the overall measurement remains linearly scaled in
decibels. The VGA gain must decrease with an increase in its
gain bias, like the AD8362. It is convenient to select a VGA
needing only a single 5 V supply and capable of generating a
fully balanced differential output. All of these conditions are
met by the AD8330. Figure 61 shows the schematic. The signal
can be applied to the AD8330 in either single-ended or
differential form by using a variety of coupling arrangements
(see the AD8330 data sheet for more information).
The basic gain of the AD8330 varies from 0 dB to 50 dB. Here it
is raised 8 dB by driving VMAG from the 1.25 V available from
the AD8362, whose 200 Ω loading on the 150 Ω ROUT of the
AD8330 in turn lowers the overall gain by 5 dB. The peak gain
is thus ~53 dB. (Mismatches between the on-chip resistors in
each IC can cause a gain error of up to 1.3 dB.)
Using the AD8330’s inverse gain mode (MODE pin low), its
gain decreases on a slope of 30 mV/dB to a minimum value of
3 dB for a gain voltage (VDBS) of 1.5 V. VDBS is 40% of the
AD8362’s output. Over the 3 V range from 0.5 V to 3.5 V, the
gain of the AD8330 varies by (0.4 × 3 V)/(30 mV/dB), that is,
40 dB. Combined with the 60 dB gain span of the AD8362, this
results in a 100 dB variation for a 3 V change in VOUT. The
overall log slope is therefore 30 mV/dB.
The full gain noise-spectral density at the AD8330’s input is
5 nV/√Hz which is raised (by 53 dB) to 2.2 mV/√Hz at its
output. To realize the full 100 dB potential, the noise at the
AD8362’s input must be much less than 1 mV rms. This
requires limiting the AD8330’s noise bandwidth to ~100 kHz
(when eN = 0.7 mV rms) provided by a single-pole, low-pass
section at the coupling interface, formed by CFLT = 18 nF and
the net differential resistance of 86 Ω (that is, 150 Ω || 200 Ω).
INPUT
(SEE AD8330
DATA SHEET)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
COMM
CHPF
DECL
INHI
INLO
DECL
PWDN
COMM
ACOM
VREF
VTGT
VPOS
VOUT
VSET
ACOM
CLPF
AD8362
VMAG
COMM
CMGN
VDBS
MODE
INLO
INHI
VPS1
CMOP
OPLO
OPHI
VPS0
CNTR
VPOS
OFST
ENBL
AD8330
6.04k
3.6V
10
µF
402k
10
µF
VOUT
3.3
5V
3.3
3.3
3.6V
ALL UNMARKED CAPACITORS ARE 0.1
µF
CFLT
18nF
Figure 61. RMS Voltmeter with >100 dB Dynamic Range




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