Moteur de recherche de fiches techniques de composants électroniques 

Nom de la pièce  Description 
AD8362EVAL Datasheet(Fiches technique) 25 Page  Analog Devices 

25 page AD8362 Rev. B  Page 25 of 36 lowers the signal currents in the squaring cells by a factor of 25. As well as making the system more sensitive to small static errors (offsets) in the postdetection circuitry, such a reduction also reduces the peak slew rate. A suitable adjustment to the value of CLPF is needed to maintain a given AGC loop bandwidth. On the other hand, increasing the target voltage can improve the accuracy and stability of the intercept for low crest factor signals. Thus, using VTGT = 2.5 V, the peak output currents of the squaring cell are quadrupled and the peak slew rate is increased by the same factor. CLPF should be increased to maintain an adequate stability margin in the AGC loop. In many applications, it is useful to use a nonstandard value of VTGT to shift the measurement range by a constant amount to accommodate either a reduced or increased range of signal inputs. The dynamic span remains >60 dB for such changes. This technique is particularly useful when the sensitivity can be lowered by raising VTGT, and there is little expectation of high crest factor signals. ADJUSTING THE INTERCEPT Another way to take advantage of the effect of VTGT is to use it to introduce an adjustment to the log intercept, represented by the voltage VZ in Equation 14. Formally, this can be expressed in terms of a modified value of VZ'. V VTGT V V Z Z ' 25 . 1 = (14) A lower VTGT effectively increases the sensitivity of the measurement system, which is just another way of stating that the intercept moves to a lower value. This raises VOUT for all input amplitudes, as demonstrated by the plots in Figure 45. This control of the measurement system’s intercept could therefore be brought about by applying the output of a DAC to the VTGT pin, if that suits the overall objectives of an application. For many purposes, a small manual adjustment range of ±3 dB is sufficient. This can be implemented as shown in Figure 55. Here, the largest fraction of VTGT is still provided by the built in reference to minimize the sensitivity to supply voltage variations. Now a variable component is provided by the trim network. For a 5 V supply, this added component of VTGT is 0 when VR1 is centered. With the slider closest to ground, VTGT is lowered by 366 mV, which corresponds to a 3 dB decrease in intercept; in the opposite condition, it is raised by 518 mV, which increases the intercept by 3 dB. That is, VTGT ranges from 1.25 V/√2 to √2 × 1.25 V. Other adjustment ranges can be readily calculated from this example. The resistance at the VTGT pin is nominally 52 kΩ; resistor values should be calculated with this in mind. In some situations, this control interface might be driven from a programmable source. In the simplest case, a logic level could provide two intercept values, differing by say, 10 dB, thus providing essentially two switched input ranges. Also, it is worth remembering that these shifts in intercept are equivalent, in most respects, to a dc offset applied to the AD8362’s output, with the main differences being that: • Varying VTGT affects the crest factor capacity to some extent • This technique makes better use of the available output range than a postVOUT adjustment would 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 COMM CHPF DECL INHI INLO DECL PWDN COMM ACOM VREF VTGT VPOS VOUT VSET ACOM CLPF AD8362 5V 4.02k Ω 4.02k Ω 5.75k Ω VR1 20k Ω Figure 55. Adjustments of the Intercept by ±3 dB ALTERING THE SLOPE None of the changes in operating conditions discussed so far affect the logarithmic slope, VSLP, in Equation 9. However, this can readily be altered by controlling the fraction of VOUT that is fed back to the setpoint interface at the VSET pin. When the full signal from VOUT is applied to VSET, the slope assumes its nominal value of 50 mV/dB. It can be increased by including an attenuator between these pins, as shown in Figure 56. Moder ately low resistance values should be used to minimize scaling errors due to the 70 kΩ input resistance at the VSET pin. Keep in mind that this resistor string also loads the output, and it eventually reduces the loaddriving capabilities if very low values are used. To calculate the resistor values, use ( )1 50 − = D ' S R2 R1 (15) where SD is the desired slope, expressed in mV/dB, and R2' is the value of R2 in parallel with 70 kΩ. For example, using R1 = 1.65 kΩ and R2 = 1.69 kΩ (R2' = 1.649 kΩ), the nominal slope is increased to 100 mV/dB. This choice of scaling is useful when the output is applied to a digital voltmeter because the displayed number reads as a decibel quantity directly, with only a decimal point shift. 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 COMM CHPF DECL INHI INLO DECL PWDN COMM ACOM VREF VTGT VPOS VOUT VSET ACOM CLPF AD8362 VOUT R1 R2 Figure 56. External Network to Raise Slope 
Lien URL 
AllDATASHEET vous atil été utile ? [ DONATE ] 
À propos de Alldatasheet  Publicité  Contacteznous  Politique de confidentialité  Favoris  Echange de liens  Fabricants All Rights Reserved © Alldatasheet.com 
Korean : Alldatasheet.co.kr  Spanish : Alldatasheet.es  French : Alldatasheet.fr  Italian : Alldatasheetit.com  Portuguese : Alldatasheetpt.com  Polish : Alldatasheet.pl 