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AD8362EVAL Datasheet(Fiches technique) 24 Page  Analog Devices 

24 page AD8362 Rev. B  Page 24 of 36 The network can readily be scaled to other frequencies by varying the product LC, while keeping the ratio L/C constant to preserve a 50 Ω input impedance. Table 4 provides some spot values; these take into account the reactive ZIN of the AD8362. Table 4. Suggested Components for NarrowBand 50 Ω Match Frequency (MHz) L (nH) C1 (pF) C2 (pF) 1 21850 2230 2765 2 10925 1115 1383 5 4370 446 553 10 2185 223 276 20 1093 112 138 50 437 45 55 100 220 22 27 200 100 10 12 500 40 3.9 4.7 This coupling method can be used down to much lower frequencies than shown in Table 4 simply by multiplying the 1 MHz component values proportionally. The effects of the reactive components of the AD8362’s inputs above 500 MHz may require some fine tuning of the suggested values. In the gigahertz region, the input coupling is usually more effectively implemented using a balun. UNCERTAINTIES IN RIN AND POWER CALIBRATION In all the cases where a 50 Ω to 200 Ω transformation is implemented, the voltage gain is only nominally ×2 (6 dB). This ideal is impaired by the fact that the input resistances of the AD8362 are not precise; variations of ±20% can be expected from lot to lot. Therefore, it is necessary to use a calibration step whenever an accurate value for the power intercept, PZ, must be established. When driven differentially, a significant improvement in intercept accuracy can be achieved by shunting the 200 Ω resistance from INHI to INLO with a 66.5 Ω resistor to set the differential input resistance to 50 Ω. Assuming a tolerance of ±20% for the basic RIN and ±1% for the chip resistor, the net input resistance could exhibit an error of ±2.5%. The resulting error in PZ (and thus in the absolute power measurement) may vary from −0.26 dB to +0.21 dB. These precautions regarding input impedance do not apply when the input is presented in voltage form, as is often the case at low frequencies, or when the source impedance is low compared to 200 Ω. For example, when using a feedback amplifier as an impedance buffer ahead of the input, as in the example in Figure 61, the loss at the interface at moderate frequencies is negligible. CHOOSING THE RIGHT VALUE FOR CHPF AND CLPF The AD8362’s 3.5 GHz variable gain amplifier includes an offset cancellation loop, which introduces a highpass filter effect in its transfer function. The corner frequency, fHP, of this filter must be below that of the lowest input signal in the desired measurement bandwidth frequency to properly measure the amplitude of the input signal. The required value of the external capacitor is given by ( ) Hz in f f CHPF HP HP μF 200 = (12) Thus, for operation at frequencies down to 100 kHz, CHPF should be 2 nF. In the standard connections for the measurement mode, the VSET pin is tied to VOUT. For small changes in input amplitude (a few decibels), the timedomain response of this loop is essentially linear with a 3 dB lowpass corner frequency of nominally fLP = 1/(CLPF × 1.1 kΩ). Internal time delays around this local loop set the minimum recommended value of this capacitor to about 300 pF, making fLP = 3 MHz. For operation at lower signal frequencies, or whenever the averaging time needs to be longer, use ( ) Hz in f f CLPF LP LP μF 900 = (13) When the input signal exhibits large crest factors, such as a WCDMA signal, CLPF must be much larger than might at first seem necessary. This is due to the presence of significant low frequency components in the complex, pseudorandom modulation, which generates fluctuations in the output of the AD8362. USE OF NONSTANDARD TARGET VOLTAGES An external connection between VREF and VTGT sets up the internal target voltage, that is, the rms voltage that must be provided by the VGA to balance the AGC feedback loop. In the default scheme, the VREF of 1.25 V positions this target to 0.06 × 1.25 V = 75 mV. In principle, however, VTGT may be driven by any voltage in the range −4 V to +4 V (the sign is ignored) to alter this target, either in a fixed or dynamic way. For example, if this pin is supplied from VREF via a simple resistive attenuator of 1 kΩ:1 kΩ, the output required from the VGA is halved (to 37.5 mV rms), which moves the nominal intercept to −73 dBV. Under these conditions, the effective headroom in the signal path that drives the squaring cell is doubled. In principle, this doubles the peak crest factor that may be handled by the system. If VTGT is reduced too far, the accuracy and stability of the intercept are compromised. The currents generated by the transconductance mode squaring cells become smaller by the square of the ratio. Thus, a factor of 5 reduction in VTGT 
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