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AD8362-EVAL Datasheet(Fiches technique) 19 Page - Analog Devices

Numéro de pièce AD8362-EVAL
Description  50 Hz to 2.7 GHz 60 dB TruPwr™ Detector
Télécharger  36 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
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AD8362
Rev. B | Page 19 of 36
DECL
INLO
INHI
DECL
VGA
COMM
COMM
VIN
VPOS
VPOS
Figure 46. Input Protection at INHI and INLO Pins
INPUT PROTECTION
Like all robust ICs, the AD8362 requires input protection
against high voltage transients at the input (ESD). However, the
techniques normally used for this purpose, based on breakdown
diodes from the input pins INHI and INLO to the supply pins
VPOS and COMM, cannot be used here because this raises the
risk of excessive signal coupling to internal nodes at the upper
end of the frequency range due to feedthrough in the
capacitances of these diodes. Package inductances cause all
internal nodes, including the supply and common lines, to have
a significant impedance back to the external ground plane; even
small disturbances on these nodes can cause anomalous
operation.
This risk is particularly evident because the main amplifier
in the AD8362’s VGA (an advanced X-AMP®) operates at full
gain under all conditions, while the signal input is variably
attenuated. Because this attenuation may be as high as 70 dB,
very small feedthrough effects in the 0.5 GHz to 3 GHz range
can have a pronounced impact on measurement accuracy.
Figure 46 shows the protection method used. The multiple
diodes arranged in back-to-back pairs limit the voltage swing
on the input pins by clamping to the two DECL pins, which
form a common ac low impedance node for the attenuators,
independently grounded via two external capacitors. The HF
currents in the capacitances of these diodes are thus shunted
directly to a signal null point.
An unavoidable consequence of this method is that the diodes
will forward-conduct when the input amplitude is sufficient.
This is not an all-or-nothing effect, of course; they shunt the
input progressively as the signal increases. This conduction is
strongest at high temperatures when the forward drop voltage
of these diodes is lowest. The overall consequence is that high
amplitude peaks are clamped to a greater or lesser degree. This
affects the measurement accuracy at the top extreme of the
dynamic range whenever the signal waveform has a high crest
factor. These effects are, of course, included in the overall
performance specifications.
POWER-ENABLE RESPONSE TIME
The operating and standby currents for the AD8362 at 27°C
are 24 mA and 275 µA, respectively. The power-down mode
is activated by a logic high on the PWDN pin. When the
shutdown feature is used, the normal operating conditions
are restored relatively quickly when this pin is taken low.
Figure 47 shows typical response times for a midscale signal
(VIN = 50 mV). The output rises to within 0.1 dB of its steady-
state value in about 20 µs; the reference voltage is available to
full accuracy in a much shorter time. This wake-up response
varies in detail depending on the input coupling means and the
capacitances CDEC, CHPF, and CLPF. These results are for a
measurement system operating in the 0.8 GHz to 2 GHz range,
balun coupled at the input port, with CDEC = 1 nF, CHPF = 0,
and CLPF = 1 nF.
TIME (
µs)
0
2.20V
2.19V
2.18V
1.26V
1.25V
1.24V
10
20
30
40
REFERENCE VOLTAGE
OUTPUT VOLTAGE
1dB
0.10mA
0.27mA
1.00mA
10.00mA
24.00mA
Figure 47. Typical Wake-Up Response; t0 = 10 µs




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