Moteur de recherche de fiches techniques de composants électroniques |
|
OP176GP Fiches technique(PDF) 11 Page - Analog Devices |
|
OP176GP Fiches technique(HTML) 11 Page - Analog Devices |
11 / 21 page OP176 REV. 0 –11– Attention to Source Impedances Minimizes Distortion Since the OP176 is a very low distortion amplifier, careful attention should be given to source impedances seen by both inputs. As with many FET-type amplifiers, the p-channel JFETs in the OP176’s input stage exhibit a gate-to-source capacitance that varies with the applied input voltage. In an inverting configuration, the inverting input is held at a virtual ground and, as such, does not vary with input voltage. Thus, since the gate-to-source voltage is constant, there is no distor- tion due to input capacitance modulation. In noninverting applications, however, the gate-to-source voltage is not constant. The resulting capacitance modulation can cause distortion above 1 kHz if the input impedance is > 2 k Ω and unbalanced. Figure 36 shows some guidelines for maximizing the distortion performance of the OP176 in noninverting applications. The best way to prevent unwanted distortion is to ensure that the parallel combination of the feedback and gain setting resistors (R F and RG) is less than 2 kΩ. Keeping the values of these resistors small has the added benefits of reducing the thermal noise of the circuit and dc offset errors. If the parallel combina- tion of R F and RG is larger than 2 kΩ, then an additional resistor, R S, should be used in series with the noninverting input. The value of R S is determined by the parallel combina- tion of R F and RG to maintain the low distortion performance of the OP176. For a more generalized treatment on circuit impedances and their effects on circuit distortion, please review the section on Active Filters at the end of the Applications section. Driving Capacitive Loads As with any high speed amplifier, care must be taken when driving capacitive loads. The graph in Figure 14 shows the OP176’s overshoot versus capacitive load. The test circuit is a standard noninverting voltage follower; it is this configuration that places the most demand on an amplifier’s stability. For capacitive loads greater than 400 pF, overshoot exceeds 40% and is roughly equivalent to a 45 ° phase margin. If the applica- tion requires the OP176 to drive loads larger than 400 pF, then external compensation should be used. Figure 37 shows a simple circuit which uses an in-the-loop compensation technique that allows the OP176 to drive any capacitive load. The equations in the figure allow optimization of the output resistor, R X, and the feedback capacitor, CF, for optimal circuit stability. One important note is that the circuit bandwidth is reduced by the feedback capacitor, C F, and is given by: BW = 1 2 π RF CF Figure 37. In-the-Loop Compensation Technique for Driving Capacitive Loads APPLICATIONS USING THE OP176 A High Speed, Low Noise Differential Line Driver The circuit of Figure 38 is a unique line driver widely used in many applications. With ±18 V supplies, this line driver can deliver a differential signal of 30 V p-p into a 2.5 k Ω load. The high slew rate and wide bandwidth of the OP176 combine to yield a full power bandwidth of 130 kHz while the low noise front end produces a referred-to-input noise voltage spectral density of 15 nV/ √Hz. The circuit is capable of driving lower impedance loads as well. For example, with a reduced output level of 5 V rms (14 V p-p), the circuit exhibits a full-power bandwidth of 190 kHz while driving a differential load of 249 Ω! The design is a transformerless, balanced transmission system where output common-mode rejection of noise is of paramount importance. Like the transformer-based design, either output can be shorted to ground for unbalanced line driver applications without changing the circuit gain of 1. Other circuit gains can be set according to the equation in the diagram. This allows the design to be easily set for noninverting, inverting, or differential operation. Figure 38. A High Speed, Low Noise Differential Line Driver 6 2 3 A2 6 3 2 A1 3 2 6 A3 VIN VO1 VO2 R3 2k Ω R9 50 Ω R11 1k Ω P1 10k Ω R12 1k Ω R10 50 Ω R8 2k Ω R2 2k Ω R5 2k Ω R4 2k Ω R1 2k Ω R7 2k Ω R6 2k Ω VO2 – VO1 = VIN A1, A2, A3 = OP176 GAIN = SET R2, R4, R5 = R1 AND R6, R7, R8 = R3 R3 R1 OP176 VIN VOUT RF RG RS* * RS = RG//RF IF RG//RF > 2kΩ FOR MINIMUM DISTORTION Figure 36. Balanced Input Impedance to Mininize Distortion in Noninverting Amplifier Circuits RX = RO RG RF OP176 CF RX CL RG RF VOUT WHERE RO = OPEN-LOOP OUTPUT RESISTANCE VIN CF = I + ( I | A CL| )( RF + RG RF ) C L RO [ ] |
Numéro de pièce similaire - OP176GP |
|
Description similaire - OP176GP |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |