RT8056

10

DS8056-02 April 2011

www.richtek.com

Layout Consideration

Follow the PCB layout guidelines for optimal performance of RT8056.

For the main current path, keep their traces short and wide.

Put the input capacitor as close as possible to the device pins (VIN and GND).

LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX

node to prevent stray capacitive noise pick-up.

Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components

near the RT8056.

Connect all analog grounds to a command node and then connect the command node to the power ground behind the

output capacitors.

Figure 3. PCB Layout Guide

FB2

NC

FB1

NC

LX2

EN2

GND

LX1

EN1

VIN

9

8

7

1

2

3

4

5

10

6

11

R4

R3

R1

R2

L1

L2

Connect the FB pin directly to

feedback resistors. The resistor

divider must be connected

The trace for L1 and L2

must be wide and short.

Keep sensitive

compontents away from

this trace.

be as close as

possible to the IC.

GND