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ADV476KN35 Fiches technique(PDF) 3 Page - Analog Devices |
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ADV476KN35 Fiches technique(HTML) 3 Page - Analog Devices |
3 / 12 page ADV476 REV. B –3– TIMING CHARACTERISTICS1 Parameter 66 MHz Version 50 MHz Version 35 MHz Version Units Conditions/Comments fMAX 66 50 35 MHz Clock Rate t1 10 10 15 ns min RS0, RS1 Setup Time t2 10 10 15 ns min RS0, RS1 Hold Time t3 5 5 5 ns min RD Asserted to Data Bus Driven t4 40 40 40 ns max RD Asserted to Data Valid t5 20 20 20 ns max RD Negated to Data Bus 3-Stated t6 10 10 15 ns min Write Data Setup Time t7 10 10 15 ns min Write Data Hold Time t8 50 50 50 ns min RD , WR Pulse Width Low t9 4 t12 4 t12 4 t12 ns min RD , WR Pulse Width High t10 3 3 4 ns min Pixel & Control Setup Time t11 3 3 4 ns min Pixel & Control Hold Time t12 15.3 20 28 ns min Clock Cycle Time t13 5 6 7 ns min Clock Pulse Width High Time t14 5 6 9 ns min Clock Pulse Width Low Time t15 30 30 30 ns max Analog Output Delay 5 5 5 ns min t16 6 8 8 ns max Analog Output Rise/Fall Time t17 3 15.3 20 25 ns typ Analog Output Settling Time t18 2 2 2 ns min Analog Output Skew tPD 4 4 4 clocks Pipeline Delay NOTES 1TTL input values are 0 to 3 volts, with input rise/fall times ≤3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and outputs. Analog output load ≤10 pF, 37.5 Ω. D0–D7 output load ≤50 pF. See timing notes in Figure 2. 2Temperature Range (T MIN to TMAX); 0 to +70°C 3Settling time does not include clock and data feedthrough. For this test, the digital inputs have a 1 k Ω resistor to ground and are driven by 74HC logic. Specifications subject to change without notice. Figure 1. MPU Read/Write Timing Figure 2. Video Input/Output Timing (VCC = +5 V 10%. All Specifications TMIN to TMAX 2) |
Numéro de pièce similaire - ADV476KN35 |
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Description similaire - ADV476KN35 |
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