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ADP1073AN-5 Fiches technique(PDF) 11 Page - Analog Devices

No de pièce ADP1073AN-5
Description  Micropower DC.DC Converter Adjustable and Fixed 3.3 V, 5 V, 12 V
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
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ADP1073AN-5 Fiches technique(HTML) 11 Page - Analog Devices

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ADP1073
–11–
REV. 0
OSCILLATOR
VIN
SW2
SW1
RLIM
(EXTERNAL)
DRIVER
ILIM
Q1
ADP1073
Q2
Q3
R1
80
(INTERNAL)
Figure 21. Current Limit Operation
Programming the Gain Block
The gain block of the ADP1073 can be used as a low battery
detector, error amplifier or linear post regulator. The gain block
consists of an op amp with PNP inputs and an open-collector
NPN output. The inverting input is internally connected to the
ADP1073’s 212 mV reference, while the noninverting input is
available at the SET pin. The NPN output transistor will sink
about 100
µA.
Figure 22a shows the gain block configured as a low-battery
monitor. Resistors R1 and R2 should be set to high values to
reduce quiescent current, but not so high that bias current in
the SET input causes large errors. A value of 100 k
Ω for R2 is a
good compromise. The value for R1 is then calculated from the
formula:
R1
=
V LOBATT − 212 mV
212 mV
R2
where VLOBATT is the desired low battery trip point. Since the
gain block output is an open-collector NPN, a pull-up resistor
should be connected to the positive logic power supply.
VIN
+5V
GND
ADP1073
R1
AO
SET
R2
100k
TO
PROCESSOR
212mV
REF
VBAT
R1 = R2
(
–1
)
VLB
212mV
VLB = BATTERY TRIP POINT
Figure 22a. Setting the Low Battery Detector Trip Point
VIN
+5V
GND
ADP1073
R1
AO
SET
R2
33k
47k
TO
PROCESSOR
212mV
REF
VBAT
R3
1.6M
Figure 22b. Adding Hysteresis to the Low Battery Detector
The circuit of Figure 22a may produce multiple pulses when
approaching the trip point, due to noise coupled into the SET
input. To prevent multiple interrupts to the digital logic, hyster-
esis can be added to the circuit (Figure 22b). Resistor R
HYS, with
a value of 1 M
Ω to 10 MΩ, provides the hysteresis. The addi-
tion of R
HYS will change the trip point slightly, so the new value
for R1 will be:
R1
=
V LOBATT – 212 mV
212 mV
R2


V L – 212 mV
RL + RHYS


where VL is the logic power supply voltage, RL is the pull-up
resistor and RHYS creates the hysteresis.
The gain block can also be used as a control element to reduce
output ripple. The ADP3000 is normally recommended for low-
ripple applications, but its minimum input voltage is 2 V. The
gain-block technique using the ADP1073 can be useful for step-
up converters operating down to 1 V.
A step-up converter using this technique is shown in Figure 23.
This configuration uses the gain block to sense the output volt-
age and control the comparator. The result is that the compara-
tor hysteresis is reduced by the open loop gain of the gain block.
Output ripple can be reduced to only a few millivolts with this
technique, versus a typical value of 150 mV for a +5 V converter
using just the comparator. For best results, a large output
capacitor (1000
µF or more) should be specified. This tech-
nique can also be used for step-down or inverting applications,
but the ADP3000 is usually a more appropriate choice. See the
ADP3000 data sheet for further details.
D1
ILIM
VIN
SW1
FB
SW2
GND
ADP1073
L1
R1
C1
AO
R2
R3
680k
SET
VBAT
VOUT
VOUT =
(
+1
) (212mV)
R1
R2
Figure 23. Using the Gain Block to Reduce Output Ripple


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