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STPMC1 Fiches technique(PDF) 8 Page - STMicroelectronics |
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STPMC1 Fiches technique(HTML) 8 Page - STMicroelectronics |
8 / 77 page Pin configuration STPMC1 8/77 Doc ID 15728 Rev 6 2 Pin configuration Figure 2. Pin connections (top view) MOP SCS V DD V SS V CC LED SDATD SCLNLC XTAL1 XTAL2 SYN V SSA MON V OTP DAH DAR CLK DAN DAT DAS MOP SCS V DD V SS V CC LED SDATD SCLNLC XTAL1 XTAL2 SYN V SSA MON V OTP DAH DAR CLK DAN DAT DAS Table 2. Pin description Pin n° Symbol Type (1) Name and function 1 MON D / P O Programmable output pin, see Table 5 2 MOP D / P O Programmable output pin, see Table 5 3 SCS D I Digital input pin, see Table 5 4VDD A O 1.8 V output of internal low drop regulator which supplies the digital core 5VSS A GND Ground level for pad-ring and power supply return 6VCC P I Supply voltage 7VOTP P I Supply voltage for OTP cells 8 DAH D I Input for non-multiplexed ΔΣ signals 9 DAR D I Input for multiplexed ΔΣ R-phase signals 10 DAS D I Input for multiplexed ΔΣ S-phase signals 11 DAT D I Input for multiplexed ΔΣ T-phase signals 12 DAN D I Input for multiplexed ΔΣ PTAT and neutral signal 13 CLK D O 2 mA clock output for STPMSx devices 14 VSSA A GND Ground level of core 15 SYN D I/O Programmable input/output pin, see Table 5 16 XTAL2 A Crystal oscillator pin 17 XTAL1 A Crystal oscillator pin 18 SCLNLC D I/O Programmable input/output pin, see Table 5 19 SDATD D I/O Programmable input/output pin, see Table 5 20 LED D O Programmable output pin, see Table 5 1. A: Analog, D: Digital, P: Power, I: Input, O: Output, GND: Ground |
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