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ST8024L Fiches technique(PDF) 8 Page - STMicroelectronics |
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ST8024L Fiches technique(HTML) 8 Page - STMicroelectronics |
8 / 35 page Pin configuration ST8024L 8/35 Doc ID 17709 Rev 5 AUX2 Auxiliary line to and from card (C8) (internal 11 k Ω pull-up resistor connected to VCC) 12 N. A. AUX1 Auxiliary line to and from card (C4) (internal 11 k Ω pull-up resistor to VCC)13 N. A CGND Ground for card signal (C5) 14 9 CLK Clock to card (C3) 15 10 RST Card reset (C2) 16 11 VCC Supply voltage for the card (C1) 17 12 PORADJ Power-on reset threshold adjustment input (ST8024LCDR, ST8024LCTR) 18 N. A. 1.8V 1.8 V VCC operation selection. Logic high selects 1.8 V operation and overrides any setting on the 5V/3V pin. With an internal 11 k Ω pull-down resistor to GND. (ST8024LACDR, ST8024LACTR and ST8024LTR) 13 CMDVCC Start activation sequence input (active low) 19 14 RSTIN Card reset input from MCU 20 15 VDD Supply voltage 21 16 GND Ground 22 17 OFF Interrupt to MCU (active low) 23 18 XTAL1 Crystal or external clock input 24 19 XTAL2 Crystal connection (leave this pin open if external clock is used) 25 N.A I/OUC MCU data I/O line (internal 11 k Ω pull-up resistor connected to VDD)26 20 AUX1UC Non-inverting receiver input (internal 11 k Ω pull-up resistor connected to VDD)27 N. A. AUX2UC Non-inverting receiver input (internal 11 k Ω pull-up resistor connected to VDD)28 N. A. Table 2. Pin description (continued) Symbol Name and function SO-28/ TSSOP-28 TSSOP-20 |
Numéro de pièce similaire - ST8024L |
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Description similaire - ST8024L |
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