CXD3029R datasheet(66/201 Pages) SONY

No de pièce	CXD3029R

Description	CD Digital Signal Processor with Built-in Digital Servo Shock-proof Memory Controller Digital High & Bass Boost

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Fabricant	SONY [Sony Corporation]

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CXD3029R

$A9E commands (preset: $A9E00000)

Data 1

D3

1

D2

0

D1

0

D0

1

D3

1

D2

1

D1

1

D0

0

D3

1

D2

DRWR

D1

DRADR

D0

0

D3

DRD15

D2

DRD14

D1

DRD13

D0

DRD12

A9E

(DRAM I/F)

Data 2

Data 3

Data 4

Command

D3

DRD11

D2

DRD10

D1

DRD9

D0

DRD8

D3

DRD7

D2

DRD6

D1

DRD5

D0

DRD4

D3

DRD3

D2

DRD2

D1

DRD1

D0

DRD0

Data 5

Data 6

Data 7

DRWR:

This bit sets write/read for access from the microcomputer to the DRAM.

When "0", the read from DRAM mode is set. (default)

When "1", the write to DRAM mode is set.

DRADR:

This bit sets the address control method for access from the microcomputer to the DRAM.

When "0", relative address control is set. (default)

When "1", absolute address control is set.

DRD15 to DRD0: These bits set the data to be written to the DRAM for access from the microcomputer to the

DRAM.

$A9F commands (preset: $A9F00000)

Data 1

D3

1

D2

0

D1

0

D0

1

D3

1

D2

1

D1

1

D0

1

D3

DADR19

D2

DADR18

D1

DADR17

D0

DADR16

D3

DADR15

D2

DADR14

D1

DADR13

D0

DADR12

A9F

(DRAM I/F)

Data 2

Data 3

Data 4

Command

D3

DADR11

D2

DADR10

D1

DADR9

D0

DADR8

D3

DADR7

D2

DADR6

D1

DADR5

D0

DADR4

D3

DADR3

D2

DADR2

D1

DADR1

D0

DADR0

Data 5

Data 6

Data 7

DADR19 to DADR0:

These bits set the DRAM address for access from the microcomputer to the DRAM.

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