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CXD1812R Fiches technique(PDF) 8 Page - Sony Corporation |
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CXD1812R Fiches technique(HTML) 8 Page - Sony Corporation |
8 / 56 page – 8 – CXD1812Q/R 1-1. Categories of input pins (1) TTL input level pin: D0 to D7, MDB0 to MDB7, HDB0 to HDBF, DASP, XPDI (2) CMOS input level pin: MDAT, LRCK, SBIN, SCOR, WFCK, C2PO (3) TTL Schmitt input level pin: XCS, XWR, XRD, A0 to A5, HA0 to HA2, XHAC, XHRD, XHWR, HCS0 to HCS1, HRST (4) CMOS Schmitt input level pin: BCLK, XRST (5) Input pin with pull-up resistor: D0 to D7, MDB0 to MDB7, HCS0 to HCS1, HRST 1-2. Categories of output pins (6) Normal output pin: D0 to D7, MDB0 to MDB7, XINT, MA0 to MA9, XMWR, MCLK, HCLK, EXCK (7) Powered output pin: HINT, HDRQ, HDB0 to HDBF, DASP, XPDI, XS16, REDY (8) Proportional output pin: XRAS, XCAS (9) Tristate output pin: XINT, HINT, HDRQ (10) Open drain output pin: DASP, XPDI, XS16, REDY 1-3. Bidirectional pins D0 to D7, MDB0 to MDB7, HDB0 to HDBF, DASP, XPDI 1-4. Oscillation cell Input: XTL1 Output: XTL2 1-5. I/O Capacitance (VDD = VI = 0V, f = 1MHz) Item Symbol Min. Typ. Max. Unit Input capacitance Output capacitance I/O capacitance CIN COUT CI/O 9 11 11 pF pF pF |
Numéro de pièce similaire - CXD1812R |
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Description similaire - CXD1812R |
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