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TC74VHCV373FK Fiches technique(PDF) 6 Page - Toshiba Semiconductor |
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TC74VHCV373FK Fiches technique(HTML) 6 Page - Toshiba Semiconductor |
6 / 10 page TC74VHCV373FT/FK 2010-07-28 6 AC Electrical Characteristics (input: tr = tf = 3 ns) Test Condition Ta = 25°C Ta = −40 to 85°C Characteristics Symbol VCC (V) CL (pF) Min Typ. Max Min Max Unit 15 ― 10.7 15.7 1.0 19.0 2.5 ± 0.2 50 ― 13.5 19.3 1.0 22.0 15 ― 7.4 11.0 1.0 13.0 3.3 ± 0.3 50 ― 9.5 14.5 1.0 16.5 15 ― 5.4 7.2 1.0 8.5 Propagation delay time (LE-Q) tpLH tpHL ― 5.0 ± 0.5 50 ― 7.1 9.2 1.0 10.5 ns 15 ― 13.0 17.7 1.0 20.1 2.5 ± 0.2 50 ― 15.5 21.1 1.0 24.1 15 ― 8.8 12.9 1.0 14.8 3.3 ± 0.3 50 ― 10.8 15.5 1.0 17.7 15 ― 6.2 7.2 1.0 8.5 Propagation delay time (D-Q) tpLH tpHL ― 5.0 ± 0.5 50 ― 8.0 9.3 1.0 10.6 ns 15 ― 9.4 15.8 1.0 19.0 2.5 ± 0.2 50 ― 12.3 18.8 1.0 22.0 15 ― 6.5 11.4 1.0 13.5 3.3 ± 0.3 50 ― 8.7 14.9 1.0 17.0 15 ― 4.5 8.1 1.0 9.5 3-state output enable time tpZL tpZH RL = 1 kΩ 5.0 ± 0.5 50 ― 6.2 10.1 1.0 11.5 ns 2.5 ± 0.2 50 ― 14.5 17.4 1.0 19.0 3.3 ± 0.3 50 ― 10.9 13.2 1.0 15.0 3-state output disable time tpLZ tpHZ RL = 1 kΩ 5.0 ± 0.5 50 ― 8.0 9.2 1.0 10.5 ns 2.5 ± 0.2 50 ― ― 1.5 ― 1.5 3.3 ± 0.3 50 ― ― 1.5 ― 1.5 Output to output skew tosLH tosHL (Note 1) 5.0 ± 0.5 50 ― ― 1.0 ― 1.0 ns Input capacitance CIN ― ― 4 10 ― 10 pF Output capacitance COUT ― ― 6 ― ― ― pF Power dissipation capacitance CPD (Note 2) ― 21 ― ― ― pF Note 1: Parameter guaranteed by design. tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn| Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC/8 (per latch) And the total CPD when n pcs. of Latch operate can be gained by the following equation: CPD (total) = 11 + 10·n |
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