SN74ALS819, SN74ALS29818

8BIT DIAGNOSTICS/PIPELINE REGISTERS

SDAS105A − JANUARY 1986 − REVISED OCTOBER 1986

POST OFFICE BOX 655303

POST OFFICE BOX 1443

7

Function Tables

SN74ALS819

INPUTS

OUTPUT AND I/O

MODE

SDI

SRCLK

ORCLK

SDO

Y0 − Y7

PE

DQ0 − DQ7

OPERATION OR FUNCTION

L

X

↑

X

SR7

OUTPUT

HI-Z

Serial input, shift right

H

L

↑

X

SDI

(L)

OUTPUT

INPUT

Parallel load shadow register from

DQ0 − DQ7

H

L

↑

↑

SDI

(L)

OUTPUT

INPUT

Parallel load shadow register and pipeline

register from DQ0 − DQ7

L

X

X

L

X

X

↑

↑

SR7

−

OUTPUT

INPUT

Load pipeline register from DQ0 − DQ7

L

X

↑

↑

SR7

OUTPUT

INPUT

Load pipeline register from DQ0 − DQ7 while

shifting shadow register

H

H

No

↑

↑

SDI

(H)

OUTPUT

OUTPUT

Load pipeline register from shadow register

H

X

X

X

SDI

OUTPUT

−

Serial data in to serial data out

H

H

X

X

SDI

(H)

OUTPUT

OUTPUT

HOLD

Hold shadow register, enable DQ0 − DQ7,

transitions on SRCLK ignored

L

X

X

L

X

X

X

X

SR7

−

OUTPUT

HI-Z

Disable DQ0 − DQ7 outputs

SN74ALS29818

INPUTS

OUTPUT AND I/O

OPERATION OR FUNCTION

MODE

OEY

SDI

SRCLK

ORCLK

SDO

Y0 − Y7

DQ0 − DQ7

OPERATION OR FUNCTION

L

X

X

↑

X

SR7

−

HI-Z

Serial input, shift right, disable DQ0 − DQ7

H

H

L

↑

X

SDI

(L)

INPUT

HI-Z

Parallel load shadow register from Y0 − Y7,

disable DQ0 − DQ7

H

L

L

↑

No

↑

SDI

(L)

OUTPUT

HI-Z

Parallel load shadow register from pipeline

register, disable DQ0 − DQ7

L

X

X

X

↑

SR7

−

INPUT†

Load pipeline register from DQ0 − DQ7

L

X

X

↑

↑

SR7

−

INPUT†

Load pipeline register from DQ0 − DQ7 while

shifting shadow register

H

X

X

No

↑

↑

SDI

−

−

Load pipeline register from shadow register

H

X

X

X

X

SDI

−

−

Serial data in to serial data out

H

L

L

↑

↑

SDI

(L)

OUTPUT

HI-Z

Exchange data between registers,

DQ0 − DQ7 disabled

H

X

H

X

X

SDI

(H)

−

−

Hold shadow register, transitions on SRCLK

do not effect shadow register

H

X

H

↑

X

SDI

(H)

−

OUTPUT

Enable DQ0 − DQ7 for parallel shadow

register output

† The DQ0 −DQ7 outputs must be disabled before applying data to DQ0 −DQ7.