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TLC5903PZP Fiches technique(PDF) 9 Page - Texas Instruments |
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TLC5903PZP Fiches technique(HTML) 9 Page - Texas Instruments |
9 / 23 page TLC5903 LED DRIVER SLLS383 – DECEMBER 1999 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (continued) ac characteristics over recommended ranges of operating free-air temperature, VCC(LOG) = VCC(ANA) = PVCC = 4.5 V to 5.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DCLK clock frequency f(DCLK) At single operation 15 MHz DCLK clock frequency, f(DCLK) At cascade operation 10 MHz DCLK pulse duration (high or low level), tw(h)/tw(l) 20 ns Frequency division ratio 1/1 8 MHz GSCLK clock frequency, f(GSCLK) Frequency division ratio 1/1, TA = 25°C, VCC(LOG) = VCC(ANA) = PVCC = 5 V 15 MHz GSCLK pulse duration (high or low level), tw(h)/tw(l) 50 ns WDT clock frequency, f(WDT) 5 MHz WDT pulse duration (high or low level), tw(h)/tw(l) 50 ns LAT pulse duration (high or low level) tw(h) LATCH 50 ns Rise/fall time, tr/tf 100 ns DINn – DCLK 10 DINn DCLK LATCH – DCLK 10 15 BLANK – GSCLK 20 Setup time, tsu ENABLE – DCLK 15 ns , su LATCH – GSCLK 10 RSEL – DCLK 10 RSEL – LATCH 20 DINn – DCLK 15 DINn DCLK LATCH – DCLK 15 30 Hold time, tn ENABLE – DCLK 20 ns , n RSEL – DCLK 20 RSEL – LATCH 20 |
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