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FM25V20-G Fiches technique(PDF) 4 Page - Ramtron International Corporation |
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FM25V20-G Fiches technique(HTML) 4 Page - Ramtron International Corporation |
4 / 17 page FM25V20 – 2Mb SPI F-RAM Rev. 3.0 August 2012 Page 4 of 17 System Hookup The SPI interface uses a total of four pins: clock, data-in, data-out, and chip select. A typical system configuration uses one or more FM25V20 devices with a microcontroller that has a dedicated SPI port, as Figure 3 illustrates. Note that the clock, data-in, and data-out pins are common among all devices. The Chip Select and Hold pins must be driven separately for each FM25V20 device. For a microcontroller that has no dedicated SPI bus, a general purpose port may be used. To reduce hardware resources on the controller, it is possible to connect the two data pins together and tie off the Hold pin. Figure 4 shows a configuration that uses only three pins. SPI Microcontroller FM25V20 Q D C S HOLD FM25V20 Q D C S HOLD SCK MOSI MISO SS1 SS2 HOLD1 HOLD2 MOSI : Master Out Slave In MISO : Master In Slave Out SS : Slave Select Figure 3. 4Mbit (512KB) System Configuration with SPI port Microcontroller FM25V20 Q D C S HOLD P1.0 P1.1 P1.2 VDD Figure 4. System Configuration without SPI port |
Numéro de pièce similaire - FM25V20-G |
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Description similaire - FM25V20-G |
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