Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

74GTLPH1616DGGRG4 Fiches technique(PDF) 4 Page - Texas Instruments

No de pièce 74GTLPH1616DGGRG4
Description  17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
Download  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

74GTLPH1616DGGRG4 Fiches technique(HTML) 4 Page - Texas Instruments

  74GTLPH1616DGGRG4 Datasheet HTML 1Page - Texas Instruments 74GTLPH1616DGGRG4 Datasheet HTML 2Page - Texas Instruments 74GTLPH1616DGGRG4 Datasheet HTML 3Page - Texas Instruments 74GTLPH1616DGGRG4 Datasheet HTML 4Page - Texas Instruments 74GTLPH1616DGGRG4 Datasheet HTML 5Page - Texas Instruments 74GTLPH1616DGGRG4 Datasheet HTML 6Page - Texas Instruments 74GTLPH1616DGGRG4 Datasheet HTML 7Page - Texas Instruments 74GTLPH1616DGGRG4 Datasheet HTML 8Page - Texas Instruments 74GTLPH1616DGGRG4 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 18 page
background image
www.ti.com
SN74GTLPH1616
17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
WITH BUFFERED CLOCK OUTPUTS
SCES346C – JANUARY 2001 – REVISED DECEMBER 2005
FUNCTION TABLES
abc
OUTPUT ENABLE(1)
INPUTS
OUTPUT
MODE
B
CEAB
OEAB
LEAB
CLKAB
A
X
H
X
X
X
Z
Isolation
L
L
L
H
X
B0(2)
Latched storage of A data
L
L
L
L
X
B0(3)
X
L
H
X
L
L
True transparent
X
L
H
X
H
H
L
L
L
L
L
Clocked storage of A data
L
L
L
H
H
H
L
L
X
X
B0(3)
Clock inhibit
(1)
A-to-B data flow is shown; B-to-A data flow is similar, but uses CEBA, OEBA, LEBA, and CLKBA. The
condition when OEAB and OEBA are both low at the same time is not recommended.
(2)
Output level before the indicated steady-state input conditions were established, provided that CLKAB
was high before LEAB went low
(3)
Output level before the indicated steady-state input conditions were established
BUFFERED CLOCK
INPUTS
OPERATION OR
MODE
FUNCTION
CE
LE
OEAB
OEBA
X
X
H
H
Z
Isolation
X
X
L
H
CLKAB to CLKOUT
True delayed clock signal
X
X
H
L
CLKOUT to CLKIN
CLKAB to CLKOUT,
True delayed clock signal
X
X
L
L
CLKOUT to CLKIN
with feedback path(1)
(1)
This condition is not recommended.
B-PORT EDGE-RATE CONTROL (ERC)
INPUT ERC
OUTPUT
LOGIC
NOMINAL
B-PORT EDGE RATE
LEVEL
VOLTAGE
L
GND
Slow
H
VCC
Fast
4


Numéro de pièce similaire - 74GTLPH1616DGGRG4

FabricantNo de pièceFiches techniqueDescription
logo
Texas Instruments
74GTLPH1612DGGRE4 TI-74GTLPH1612DGGRE4 Datasheet
157Kb / 15P
[Old version datasheet]   18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
More results

Description similaire - 74GTLPH1616DGGRG4

FabricantNo de pièceFiches techniqueDescription
logo
Fairchild Semiconductor
GTLP17T616 FAIRCHILD-GTLP17T616 Datasheet
93Kb / 10P
   17-Bit LVTTL/GTLP Bus Transceiver with Buffered Clock
logo
Texas Instruments
SN74GTLPH32916 TI1-SN74GTLPH32916 Datasheet
397Kb / 18P
[Old version datasheet]   34-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
SN74GTLPH1612 TI-SN74GTLPH1612 Datasheet
157Kb / 15P
[Old version datasheet]   18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
SN74GTLPH1655 TI-SN74GTLPH1655 Datasheet
173Kb / 16P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
SN74GTL16616 TI-SN74GTL16616_06 Datasheet
160Kb / 14P
[Old version datasheet]   17-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
SN74GTLPH1645 TI1-SN74GTLPH1645_15 Datasheet
1Mb / 22P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SN74GTLPH3245 TI1-SN74GTLPH3245 Datasheet
435Kb / 19P
[Old version datasheet]   32-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SN74GTLPH1645 TI-SN74GTLPH1645 Datasheet
259Kb / 17P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
logo
Fairchild Semiconductor
GTLP16616 FAIRCHILD-GTLP16616 Datasheet
72Kb / 10P
   17-Bit TTL/GTLP Bus Transceiver with Buffered Clock
logo
Texas Instruments
SN54GTL16616 TI-SN54GTL16616 Datasheet
175Kb / 11P
[Old version datasheet]   17-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS WITH BUFFERED CLOCK OUTPUTS
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com