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UC2875-EP Fiches technique(PDF) 8 Page - Texas Instruments

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No de pièce UC2875-EP
Description  PHASE SHIFT RESONANT CONTROLLER
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

UC2875-EP Fiches technique(HTML) 8 Page - Texas Instruments

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UC2875EP
PHASE SHIFT RESONANT CONTROLLER
SGLS233A − FEBRUARY 2004 − REVISED DECEMBER 2008
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION AND OPERATION INFORMATION
Because of the 1.3 V offset between the ramp input and the PWM comparator, the error amplifier output voltage
can not exceed the effective ramp peak voltage and duty cycle clamping is easily achievable with appropriate
values of RSLOPE and CRAMP.
SLOPE (set ramp slope/slope compensation): A resistor from this pin to VCC will set the current used to generate
the ramp. Connecting this resistor to the DC input line voltage will provide voltage feed-forward.
SOFTSTART (soft start): SOFTSTART will remain at GND as long as VIN is below the UVLO threshold.
SOFTSTART will be pulled up to about 4.8 V by an internal 9
µA current source when VIN becomes valid
(assuming a non-fault condition). In the event of a current-fault (CS+ voltage exceeding 2.5 V), SOFTSTART
will be pulled to GND and them ramp to 4.8 V. If a fault occurs during the SOFTSTART cycle, the outputs will
be immediately disabled and SOFTSTART must charge fully prior to resetting the fault latch.
For paralleled controllers, the SOFTSTART pins may be paralled to a single capacitor, but the charge currents
will be additive.
VC (output switch supply voltage): This pin supplies power to the output drivers and their associated bias
circuitry. Connect VC to a stable source above 3 V for normal operation, above 12 V for best performance. This
supply should be bypassed directly to the PWRGND pin with low ESR, low ESL capacitors.
VIN (primary chip supply voltage): This pin supplies power to the logic and analog circuitry on the integrated
circuit that is not directly associated with driving the output stages. Connect VIN to a stable source above 12 V
for normal operation. To ensure proper chip functionality, these devices will be inactive until VIN exceeds the
upper undervoltage lockout threshold. This pin should by bypassed directly to the GND pin with low ESR, low
ESL capacitors.
NOTE: When VIN exceeds the UVLO threshold the supply current (IIN) will jump from about 100 µA to a current
in excess of 20
µA. If the UC2875 is not connected to a well bypassed supply, it may immediately enter UVLO
again.
VREF: This pin is an accurate 5 V voltage reference. This output is capable of delivering about 60 mA to
peripheral circuitry and is internally short circuit current limited. VREF is disabled while VIN is low enough to
force the chip into UVLO. The circuit is also in UVLO until VREF reaches approximately 4.75 V. For best results
bypass VREF with a 0.1
µF, low ESR, low ESL, capacitor to the GND pin.
Figure 3. Undervoltage Lockout
When power is applied to the circuit and VIN is below the upper UVLO threshold, IIN will be below 600 µA, the
reference generator will be off, the fault latch is reset, the soft-start pin is discharged, and the outputs are actively
held low. When VIN exceeds the upper UVLO threshold, the reference generator turns on. All else remains in
the shut-down mode until the output of the reference, VREF, exceeds 4.75 V.


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