(

)

1

2

_

2

+

=

-

APD

APD

ADPTR

OFF

APDEN

APDH

APD

R

R

V

V

V

R

x

(

)

(

)

BLNK

BLNK

R

k

t

ns

Ω =

TPS23753A

www.ti.com

SLVS933B – JULY 2009 – REVISED JANUARY 2010

(2)

Place the APD pull-down resistor adjacent to the APD pin.

APD should be tied to RTN when not used.

BLNK

Blanking provides an interval between the gate drive going high and the current comparator on CS actively

monitoring the input. This delay allows the normal turn-on current transient (spike) to subside before the

comparator is active, preventing undesired short duty cycles and premature current limiting.

Connect BLNK to RTN to obtain the internally set blanking period. Connect a resistor from BLNK to RTN for a

programmable blanking period. The relationship between the desired blanking period and the programming

resistor is defined by the following equation.

(3)

Place the resistor adjacent to the BLNK pin when it is used.

CLS

ranges and corresponding resistor values are listed in Table 2. The power assigned should correspond to the

maximum average power drawn by the PD during operation. The TPS23753A supports class 0 – 3 power levels.

CS

The current sense input for the dc/dc converter should be connected to the high side of the switching MOSFET’s

time are terminated regardless of the voltage on CTL.

The TPS23753A provides internal slope compensation to stabilize the current mode control loop. If the provided

Routing between the current-sense resistor and the CS pin should be short to minimize cross-talk from noisy

traces such as the gate drive signal.

CTL

comparator is 0.5.

DEN

Connect a 24.9 k

the internal hotswap MOSFET and class regulator to turn off.

Copyright © 2009–2010, Texas Instruments Incorporated

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