TPS51462RGET datasheet(5/27 Pages) TI1

No de pièce	TPS51462RGET

Description	3.3-V/5-V Input, D-CAP??Mode Synchronous Step-Down Integrated FETs Converter With 2-Bit VID

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Fabricant	TI1 [Texas Instruments]

Site Internet	http://www.ti.com

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5 / 27 page

TPS51462

EN

MODE

VOUT

COMP

SLEW

VREF

GND

VID0

VID1

PGOOD

V5DRV

V5FILT

2

3

4

5

6

7

8

9

10

11

1

12

13

14

15

16

17

18

24

23

22

21

20

19

Thermal Pad

TPS51462

www.ti.com

SLUSAQ1

– DECEMBER 2011

RGE PACKAGE

PIN FUNCTIONS

I/O

DESCRIPTION

NO.

NAME

19

20

PGND

I

Power ground. Source terminal of the rectifying low-side power FET.

21

22

23

VIN

I

Power supply input pin. Drain terminal of the switching high-side power FET.

24

1

GND

–

Signal ground.

2

VREF

O

2.0-V reference output. Connect a 0.22-

µF ceramic capacitor to GND.

3

COMP

O

Connect series R-C to the VREF pin for loop compensation.

4

SLEW

I/O

Program the startup and voltage transition time using an external capacitor via 10-

µA current source.

5

VOUT

I

Output voltage monitor input pin.

6

MODE

I

Allows selection of switching frequencies and output voltage. (See Table 3)

7

8

9

SW

I/O

Switching node output. Connect to the external inductor.

10

11

12

Power supply for internal high-side gate driver. Connect a 0.1-

µF bootstrap capacitor between this pin and

BST

I

the SW pin.

13

EN

I

Enable of the SMPS.

14

VID0

I

2-bit VID input.

15

VID1

16

PGOOD

O

Power good output. Connect pull-up resistor.

17

V5FILT

I

5-V power supply for analog circuits.

18

V5DRV

I

5-V power supply for the gate driver.

Thermal Pad

–

Connect directly to system GND plane with multiple vias.

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Fabricant	No de pièce	Fiches technique	Description
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