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TPS2456ARHHR Fiches technique(PDF) 6 Page - Texas Instruments

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No de pièce TPS2456ARHHR
Description  Dual 12 V Protection and Blocking Controller
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TPS2456ARHHR Fiches technique(HTML) 6 Page - Texas Instruments

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TPS2456A
SLVSBI8 – JULY 2012
www.ti.com
PIN FUNCTIONS
PIN
TYPE
A/B(1)
DESCRIPTION
NAME
NO.
SENPA
1
I
A
Input voltage sense – connect to input supply. Connect to the source side of RSENSEA.
Connect RSETA from the input supply to SETA to program the current limit in conjunction with RSENSEA
SETA
2
I
A
and RMONA (see the DETAILED PIN DESCRIPTIONS).
SENMA
3
I
A
Connect this pin to the load side of the RSENSEA. The fast-trip threshold equals 100 mV / RSENSEA.
VINT
4
I/O
Connect a bypass capacitor (e.g., 0.01µF) to GND for this internal supply.
Connect RMONA from MONA to GND to set the current limit in conjunction with RSENSEA and RSETA
MONA
5
I/O
A
(see the DETAILED PIN DESCRIPTIONS).
ORENA
6
I
A
Blocking transistor enable, active high.
GND
7
GND
Connect pin to ground.
GND
8
GND
Connect pin to ground
Connect RMONB from MONB to GND to set the current limit in conjunction with RSENSEB and RSETB
MONB
9
I/O
B
(see the DETAILED PIN DESCRIPTIONS).
CTB
10
I/O
B
Connect CTB from CTB to GND to set the fault timer period (see text).
GAT2B
11
O
B
Blocking transistor gate drive.
OUTB
12
I/O
B
Output voltage monitor and bias input.
GND
13
GND
B
Connect pin to ground.
ORENB
14
I
B
Blocking transistor enable, active high.
GAT1B
15
O
B
Protection transistor gate drive.
SENMB
16
I
B
Connect this pin to the load side of the RSENSEB. The fast-trip threshold equals 100 mV / RSENSEB.
Connect RSETB from input supply to SETB to program the current limit program the current limit in
SETB
17
I
B
conjunction with RSENSEB and RMONB (see the DETAILED PIN DESCRIPTIONS).
SENPB
18
I
B
Input voltage sense – connect to input supply. Connect to the source side of RSENSEB.
INB
19
PWR
B
Control power input – connect to input supply.
20
No connection.
FLTB
21
O
B
Fault output, active low, asserted when B fault timer runs out.
PGB
22
O
B
Power good output, active low, asserts when VOUTB > 10.63 V.
GND
23
GND
Connect pin to ground.
GND
24
GND
Connect pin to ground.
GND
25
GND
Connect pin to ground.
PGA
26
O
A
Power good output, active low, asserts when VOUTA > 10.63 V.
FLTA
27
O
A
Fault output, active low, asserted when A fault timer runs out.
GND
28
GND
Connect pin to ground.
ENB
29
I
B
Enable, (active high).
GAT1A
30
O
A
Protection transistor gate drive.
ENA
31
I
A
Enable, (active high).
GND
32
GND
A
Connect pin to ground.
OUTA
33
I/O
A
Output voltage monitor and bias input.
GAT2A
34
O
A
Blocking transistor gate drive.
CTA
35
I/O
A
Connect CTA from CTA to GND to set the fault timer period (see the DETAILED PIN DESCRIPTIONS).
INA
36
PWR
A
Control power input – connect to input supply.
PAD
Solder pad to GND.
(1)
Specifies whether this pin is part of A channel, B channel, or is common to both (-).
6
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Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TPS2456A


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