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DAC5675MPHPEP Fiches technique(PDF) 1 Page - Texas Instruments

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No de pièce DAC5675MPHPEP
Description  14-Bit 400-MSPS Digital-to-Analog Converter
Download  27 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

DAC5675MPHPEP Fiches technique(HTML) 1 Page - Texas Instruments

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FEATURES
APPLICATIONS
DESCRIPTION/ORDERING INFORMATION
DAC5675-EP
SGLS381A – OCTOBER 2006 – REVISED OCTOBER 2006
14-Bit 400-MSPS Digital-to-Analog Converter
Power Dissipation: 660 mW at
fCLK = 400 MSPS, fOUT = 20 MHz
400-MSPS Update Rate
Package: 48-Pin PowerPAD™
Controlled Baseline
Thermally-Enhanced Thin Quad Flat Pack
– One Assembly
(HTQFP) TJA = 29.1°C/W
– One Test Site
– One Fabrication Site
Extended Temperature Performance of –55
°C
Cellular Base Transceiver Station Transmit
to 125
°C
Channel:
– CDMA: WCDMA, CDMA2000, IS-95
Enhanced Diminishing Manufacturing
Sources (DMS) Support
– TDMA: GSM, IS-136, EDGE/GPRS
– Supports Single-Carrier and Multicarrier
Enhanced Product-Change Notification
Applications
LVDS-Compatible Input Interface
Test and Measurement: Arbitrary Waveform
Spurious-Free Dynamic Range (SFDR) to
Generation
Nyquist
Military Communications
– 69 dBc at 70 MHz IF, 400 MSPS
W-CDMA Adjacent Channel Power Ratio
(ACPR)
– 73 dBc at 30.72-MHz IF, 122.88 MSPS
– 71 dBc at 61.44-MHz IF, 245.76 MSPS
Differential Scalable Current Outputs: 2 mA
to 20 mA
On-Chip 1.2-V Reference
Single 3.3-V Supply Operation
The DAC5675 is a 14-bit resolution high-speed digital-to-analog converter (DAC). The DAC5675 is designed for
high-speed digital data transmission in wired and wireless communication systems, high-frequency direct-digital
synthesis (DDS), and waveform reconstruction in test and measurement applications. The DAC5675 has
excellent spurious-free dynamic range (SFDR) at high intermediate frequencies, which makes it well-suited for
multicarrier transmission in TDMA- and CDMA-based cellular base transceiver stations (BTSs).
The DAC5675 operates from a single-supply voltage of 3.3 V. Power dissipation is 660 mW at
fCLK = 400 MSPS, fOUT = 70 MHz. The DAC5675 provides a nominal full-scale differential current output of 20
mA, supporting both single-ended and differential applications. The output current can be directly fed to the load
with no additional external output buffer required. The output is referred to the analog supply voltage AVDD.
The DAC5675 comprises a low-voltage differential signaling (LVDS) interface for high-speed digital data input.
LVDS features a low differential voltage swing with a low constant power consumption across frequency,
allowing for high-speed data transmission with low noise levels; that is, with low electromagnetic interference
(EMI). LVDS is typically implemented in low-voltage digital CMOS processes, making it the ideal technology for
high-speed interfacing between the DAC5675 and high-speed low-voltage CMOS ASICs or FPGAs. The
DAC5675 current-source-array architecture supports update rates of up to 400 MSPS. On-chip edge-triggered
input latches provide for minimum setup and hold times, thereby relaxing interface timing.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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