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SL74HC139N Fiches technique(PDF) 1 Page - System Logic Semiconductor |
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SL74HC139N Fiches technique(HTML) 1 Page - System Logic Semiconductor |
1 / 5 page SL74HC139 System Logic Semiconductor SLS Dual 1-of-4 Decoder/Demultiplexer High-Performance Silicon-Gate CMOS The SL74HC139 is identical in pinout to the LS/ALS139. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two independent 1-of-4 decoders, each of which decodes a two -bit Address to one-of-four active-low outputs. Active-low Selects are provided to facilitate the demultiplexing and cascading functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output, and utilizing the Select as a data input. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA • High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION SL74HC139N Plastic SL74HC139D SOIC TA = -55 ° to 125° C for all packages FUNCTION TABLE Inputs Outputs Select A1 A0 Y0 Y1 Y2 Y3 H X X H H H H L L L L H H H L L H H L H H L H L H H L H L H H H H H L X = don’t care LOGIC DIAGRAM PIN 16 =VCC PIN 8 = GND PIN ASSIGNMENT |
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