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SL4520BD Fiches technique(PDF) 1 Page - System Logic Semiconductor

No de pièce SL4520BD
Description  Dual Up-Counter
Download  5 Pages
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Fabricant  SLS [System Logic Semiconductor]
Site Internet  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL4520BD Fiches technique(HTML) 1 Page - System Logic Semiconductor

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SL4520B
System Logic
Semiconductor
SLS
Dual Up-Counter
High-Voltage Silicon-Gate CMOS
The SL4520B Dual Binary Up-Counter consists two identical,
internally synchronous 4-stage counters. The counter stages are D-
type flip-flops having interchangeable CLOCK and ENABLE lines for
incrementing on either the positive-going or negative-going transition.
For single-unit operation the ENABLE input is maintained high and the
counter advances on each positive-going transition of the CLOCK. The
counters are cleared by high levels on their RESET lines.
The counter can be cascaded in the ripple mode by connecting Q4
to the enable input of the subsequent counter while the CLOCK input
of the latter is held low.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25
°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4520BN Plastic
SL4520BD SOIC
TA = -55
° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=VCC
PIN 8= GND
FUNCTION TABLE
Inputs
Outputs
CLOCK
ENABLE
RESET
Mode
H
L
Increment Counter
L
L
Increment Counter
X
L
No Change
X
L
No Change
L
L
No Change
H
L
No Change
X
X
H
Q1 thru Q4=L
X = don’t care


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