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Si4842DY Fiches technique(PDF) 4 Page - Analog Devices |
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Si4842DY Fiches technique(HTML) 4 Page - Analog Devices |
4 / 40 page ADP1878/ADP1879 Data Sheet Rev. A | Page 4 of 40 Parameter Symbol Test Conditions/Comments Min Typ Max Unit ADP1878ACPZ-0.6-R7/ ADP1879ACPZ-0.6-R7 600 kHz On Time VIN = 5 V, VOUT = 2 V, TJ = 25°C 500 540 605 ns Minimum On Time VIN = 20 V, VOUT = 0.8 V 82 110 ns Minimum Off Time 65% duty cycle (maximum) 340 400 ns ADP1878ACPZ-1.0-R7/ ADP1879ACPZ-1.0-R7 1.0 MHz On Time VIN = 5 V, VOUT = 2 V, TJ = 25°C 285 312 360 ns Minimum On Time VIN = 20 V 52 85 ns Minimum Off Time 45% duty cycle (maximum) 340 400 ns OUTPUT DRIVER CHARACTERISTICS High-Side Driver Output Source Resistance ISOURCE = 1.5 A, 100 ns, positive pulse (0 V to 5 V) 2.20 3 Ω Output Sink Resistance ISINK = 1.5 A, 100 ns, negative pulse (5 V to 0 V) 0.72 1 Ω Rise Time2 tr, DRVH BST − SW = 4.4 V, CIN = 4.3 nF (see Figure 59) 25 ns Fall Time2 tf, DRVH BST − SW = 4.4 V, CIN = 4.3 nF (see Figure 60) 11 ns Low-Side Driver Output Source Resistance ISOURCE = 1.5 A, 100 ns, positive pulse (0 V to 5 V) 1.5 2.2 Ω Output Sink Resistance ISINK = 1.5 A, 100 ns, negative pulse (5 V to 0 V) 0.7 1 Ω Rise Time2 tr,DRVL VREG = 5.0 V, CIN = 4.3 nF (see Figure 60) 18 ns Fall Time2 tf,DRVL VREG = 5.0 V, CIN = 4.3 nF (see Figure 59) 16 ns Propagation Delays DRVL Fall to DRVH Rise2 ttpdhDRVH BST − SW = 4.4 V (see Figure 59) 15.7 ns DRVH Fall to DRVL Rise2 ttpdhDRVL BST − SW = 4.4 V (see Figure 60) 16 ns SW Leakage Current ISWLEAK BST = 25 V, SW = 20 V, VREG = 5 V 110 μA Integrated Rectifier Channel Impedance ISINK = 10 mA 22.3 Ω PRECISION ENABLE THRESHOLD Logic High Level VIN = 2.9 V to 20 V, VREG = 2.75 V to 5.5 V 605 634 663 mV Enable Hysteresis VIN = 2.9 V to 20 V, VREG = 2.75 V to 5.5 V 31 mV COMP VOLTAGE COMP Clamp Low Voltage VCOMP(LOW) Tie EN pin to VREG to enable device (2.75 V ≤ VREG ≤ 5.5 V) 0.47 V COMP Clamp High Voltage VCOMP(HIGH) (2.75 V ≤ VREG ≤ 5.5 V) 2.55 V COMP Zero Current Threshold VCOMP_ZCT (2.75 V ≤ VREG ≤ 5.5 V) 1.10 V THERMAL SHUTDOWN TTMSD Thermal Shutdown Threshold Rising temperature 155 °C Thermal Shutdown Hysteresis 15 °C CURRENT LIMIT Hiccup Current-Limit Timing COMP = 2.4 V 6 ms OVERVOLTAGE AND POWER- GOOD THRESHOLDS PGOOD FB Power-Good Threshold FBPGD VFB rising during system power up 542 566 mV FB Power-Good Hysteresis 34 55 mV FB Overvoltage Threshold FBOV VFB rising during overvoltage event, IPGOOD = 1 mA 691 710 mV FB Overvoltage Hysteresis 35 55 mV PGOOD Low Voltage During Sink VPGOOD IPGOOD = 1 mA 143 200 mV PGOOD Leakage Current PGOOD = 5 V 1 100 nA 1 The maximum specified values are with the closed loop measured at 10% to 90% time points (see Figure 59 and Figure 60), CGATE = 4.3 nF, and the high- and low-side MOSFETs being Infineon BSC042N03MS G. 2 Not automatic test equipment (ATE) tested. |
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