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BUK6C2R1-55C Fiches technique(PDF) 3 Page - NXP Semiconductors |
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BUK6C2R1-55C Fiches technique(HTML) 3 Page - NXP Semiconductors |
3 / 13 page BUK6C2R1-55C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 3 — 18 January 2012 3 of 13 NXP Semiconductors BUK6C2R1-55C N-channel TrenchMOS intermediate level FET 4. Limiting values [1] Accumulated pulse duration not to exceed 5mins. [2] -16V accumulated duration not to exceed 168 hrs. Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 55 V VGS gate-source voltage Pulsed [1] -20 20 V DC [2] -16 16 V ID drain current Tmb =25°C; VGS =10V; see Figure 1 - 228 A Tamb = 100 °C; VGS =10V; see Figure 1 - 162 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 - 914 A Ptot total power dissipation Tmb =25°C; see Figure 2 - 300 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb = 25 °C - 228 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 914 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID =120 A; Vsup ≤ 55 V; RGS =50 Ω; VGS =10V; Tj(init) = 25 °C; unclamped - 770 mJ Fig 1. Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aaf964 0 50 100 150 200 250 0 50 100 150 200 Tmb (°C) ID (A) Tmb (°C) 0 200 150 50 100 03na19 40 80 120 Pder (%) 0 |
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