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LC877C48C Fiches technique(PDF) 7 Page - Sanyo Semicon Device |
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LC877C48C Fiches technique(HTML) 7 Page - Sanyo Semicon Device |
7 / 21 page LC877C64C/56C/48C/40C/32C/24C No.A0135-7/21 Pin Description Pin name I/O Function Option VSS1, VSS2, VSS3 - • Power supply (-) No VDD1, VDD2 VDD3 - • Power supply (+) No PORT0 P00 to P07 I/O • 8bit input/output port • Data direction programmable in nibble units • Use of pull-up resistor can be specified in nibble units • Input for HOLD release • Input for port 0 interrupt • Other functions P05: clock output (system clock / can selected from sub clock) P06: timer 6 toggle output P07: timer 7 toggle output Yes PORT1 P10 to P17 I/O • 8bit input/output port • Data direction programmable for each bit • Use of pull-up resistor can be specified for each bit individually • Other pin functions P10 SIO0 data output P11 SIO0 data input or bus input/output P12 SIO0 clock input/output P13 SIO1 data output P14 SIO1 data input or bus input/output P15 SIO1 clock input/output P16: Timer 1 PWML output P17: Timer 1 PWMH output/Buzzer output Yes • 4bit Input/output port • Data direction can be specified for each bit • Use of pull-up resistor can be specified for each bit individually • Other functions P70: INT0 input/HOLD release input/Timer0L capture input/output for watchdog timer P71: INT1 input/HOLD release input/Timer0H capture input P72: INT2 input/HOLD release input/timer 0 event input/Timer0L capture input P73: INT3 input(noise rejection filter attached)/timer 0 event input/Timer0H capture input AD input port: AN8(P70), AN9(P71) • Interrupt detection selection Rising Falling Rising and falling H level L level INT0 INT1 INT2 INT3 enable enable enable enable enable enable enable enable disable disable enable enable enable enable disable disable enable enable disable disable PORT7 P70 to P73 I/O No Continued on next page. |
Numéro de pièce similaire - LC877C48C |
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Description similaire - LC877C48C |
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