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LC863G40A Fiches technique(PDF) 11 Page - Sanyo Semicon Device

No de pièce LC863G40A
Description  CGROM16K-byte on-chip 768-byte RAM and 352횞9 bit OSD RAM 8-bit 1-chip Microcontroller
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Fabricant  SANYO [Sanyo Semicon Device]
Site Internet  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC863G40A Fiches technique(HTML) 11 Page - Sanyo Semicon Device

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LC863G64A/56A/48A/40A/32A/28A/24A
No.A0548-11/21
Recommended Operating Range at Ta = -10°C to +70°C, VSS = 0V
Specification
Parameter
Symbol
Pins
Conditions
VDD[V]
min
typ
max
unit
VDD(1)
0.844µs
≤ tCYC ≤ 0.852µs
4.5
5.5
Operating
supply voltage
range
VDD(2)
VDD
4µs
≤ tCYC ≤ 400µs
4.5
5.5
Hold voltage
VHD
VDD
RAMs and the registers
data are kept in HOLD
mode.
2.0
5.5
VIH(1)
Port 0 (Schumitt)
Output disable
4.5 to 5.5
0.6VDD
VDD
VIH(2)
• Ports 1,6
(Schumitt
CMOS)
• Port 7 (Schumitt)
port input/interrupt
• HS, VS, RES
(Schumitt)
Output disable
4.5 to 5.5
0.75VDD
VDD
VIH(3)
Port 70
Watchdog timer input
Output disable
4.5 to 5.5
VDD-0.5
VDD
VIH(4)
• Port 8
port input
Output disable
4.5 to 5.5
0.7VDD
VDD
High level
input voltage
VIH(5)
• Port 16 (TTL)
• Port 6
(Schumitt TTL)
port input
Output disable
4.5 to 5.5
0.45VDD
VDD
VIL(1)
Port 0 (Schumitt)
Output disable
4.5 to 5.5
VSS
0.2VDD
VIL(2)
• Ports 1,6
(Schumitt
CMOS)
• Port 7 (Schumitt)
port input/interrupt
• HS, VS, RES
(Schumitt)
Output disable
4.5 to 5.5
VSS
0.25VDD
VIL(3)
Port 70
Watchdog timer input
Output disable
4.5 to 5.5
VSS
0.6VDD
VIL(4)
Port 8
port input
Output disable
4.5 to 5.5
VSS
0.3VDD
V
Low level
input voltage
VIL(5)
• Port 16 (TTL)
• Port 6 (Schumitt TTL)
port input
Output disable
4.5 to 5.5
VSS
0.18VDD
CVIN
VCVIN
CVIN
5.0
1Vp-p
-3dB
1Vp-p
1Vp-p
+3dB
Vp-p*
tCYC(1)
• All functions operating
4.5 to 5.5
0.844
0.848
0.852
tCYC(2)
• AD converter operating
• OSD and Data slicer
are not operating
4.5 to 5.5
0.844
30
Operation
cycle time
tCYC(3)
• OSD, AD converter and
Data slicer are
not operating
4.5 to 5.5
0.844
400
µs
Oscillation
frequency range
FmRC
Internal RC oscillation
4.5 to 5.5
0.4
0.8
3.0
External
OSD clock
input frequency
range
FmICK
P16/OSDCK
DUTY50
±5% of external
OSD clock
4.5 to 5.5
13
14
15
MHz
* Vp-p: Peak-to-peak voltage


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