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ISL23448UFRZ Fiches technique(PDF) 2 Page - Intersil Corporation

No de pièce ISL23448UFRZ
Description  Quad, 128 Tap, Low Voltage Digitally Controlled Potentiometer (XDCP??
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Fabricant  INTERSIL [Intersil Corporation]
Site Internet  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL23448UFRZ Fiches technique(HTML) 2 Page - Intersil Corporation

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ISL23448
2
FN7905.0
August 19, 2011
Block Diagram
POWER UP
INTERFACE
CONTROL
AND
STATUS
LOGIC
I/O
BLOCK
VCC
GND
SDI
SDO
SCK
VLOGIC
LEVEL
SHIFTER
WR0
VOLATILE
REGISTER
WR1
VOLATILE
REGISTER
WR2
VOLATILE
REGISTER
WR3
VOLATILE
REGISTER
RH0
RW0
RL0
RH1
RW1
RL1
RH2
RW2
RL2
RH3
RW3
RL3
CS
Pin Configurations
ISL23448
(20 LD TSSOP)
TOP VIEW
ISL23448
(20 LD QFN)
TOP VIEW
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
RL0
RW0
VCC
RH0
RL1
RW1
GND
RH1
VLOGIC
SDI
RL3
RH3
RL2
RW2
RW3
RH2
SCK
SDO
GND
CS
RW1
SCK
RH2
RL2
RH0
RW2
VCC
RL1
RH1
SDO
1
2
3
4
5
78
9
10
15
14
13
12
11
20
19
18
17
6
GND
6
RH3
16
Pin Descriptions
TSSOP
QFN
SYMBOL
DESCRIPTION
1
19
RL0
DCP0 “low” terminal
2
20
RW0
DCP0 wiper terminal
31
VCC
Analog power supply.
Range 1.7V to 5.5V
42
RH0
DCP0 “high” terminal
5
3
RL1
DCP1 “low” terminal
6
4
RW1
DCP1 wiper terminal
75
RH1
DCP1 “high” terminal
8, 12
6, 10
GND
Ground pin
97
VLOGIC
SPI bus/logic supply
Range 1.2V to 5.5V
10
8
SDI
Logic Pin - Serial bus data input
11
9
CS
Logic Pin - Active low chip select
13
11
SDO
Logic Pin - Serial bus data output
(configurable)
14
12
SCK
Logic Pin - Serial bus clock input
15
13
RH2
DCP2 “high” terminal
16
14
RW2
DCP2 wiper terminal
17
15
RL2
DCP2 “low” terminal
18
16
RH3
DCP3 “high” terminal
19
17
RW3
DCP3 wiper terminal
20
18
RL3
DCP3 “low” terminal


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