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ISL22349UFV14Z Fiches technique(PDF) 6 Page - Intersil Corporation

No de pièce ISL22349UFV14Z
Description  Quad Digitally Controlled Potentiometers
Download  13 Pages
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Fabricant  INTERSIL [Intersil Corporation]
Site Internet  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL22349UFV14Z Fiches technique(HTML) 6 Page - Intersil Corporation

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6
FN6331.3
May 28, 2009
SDA vs SCL Timing
A0, A1, and A2 Pin Timing
tSU:A
A2, A1 and A0 Setup Time
Before START condition
600
ns
tHD:A
A2, A1 and A0 Hold Time
After STOP condition
600
ns
NOTES:
3. Typical values are for TA = +25°C and 3.3V supply voltage.
4. LSB: [V(RW)127 – V(RW)0]/127. V(RW)127 and V(RW)0 are V(RW) for the DCP register set to 7F hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
5. ZS error = V(RW)0/LSB.
6. FS error = [V(RW)127 – VCC]/LSB.
7. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 127. i is the DCP register setting.
8. INL = [V(RW)i – i • LSB – V(RW)0]/LSB for i = 1 to 127.
9. VMATCH = [V(RWx)i – V(RWy)i]/LSB, for i = 1 to 127, x = 0 to 3 and y = 0 to 3.
10.
for i = 16 to 112 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper
minimum value of the resistance over the temperature range.
11. This parameter is not 100% tested.
12. tWC is the time from a valid STOP condition at the end of a Write sequence of I2C serial interface, to the end of the self-timed internal non-volatile
write cycle.
13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 13)
TYP
(Note 3)
MAX
(Note 13)
UNIT
TC
V
Max V RW
()
i
() Min V RW
()
i
()
Max V RW
()
i
() Min V RW
()
i
()
+
[] 2
----------------------------------------------------------------------------------------------
106
165°C
-----------------
×
=
tSU:STO
tDH
tHIGH
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tF
tLOW
tBUF
tAA
tR
tsp
tHD:A
SCL
SDA
A0, A1, OR A2
tSU:A
CLK 1
START
STOP
ISL22349


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