ADRF6703 datasheet(26/36 Pages) AD

No de pièce	ADRF6703

Description	1550 MHz to 2650 MHz Quadrature Modulator with 2100 MHz to 2600 MHz Frac-N PLL

Download	36 Pages

Scroll/Zoom	100%

Fabricant	AD [Analog Devices]

Site Internet	http://www.analog.com

Logo

26 / 36 page

ADRF6703

Rev. 0 | Page 26 of 36

REGISTER 5—LO PATH AND MODULATOR

CONTROL (DEFAULT: 0X0000D5)

With Register 5, Bits[2:0] set to 101, the LO path and modulator

control register is programmed as shown in Figure 46.

The modulator output or the complete modulator can be

disabled using the modulator bias enable and modulator

output enable addresses of Register 5.

The LO port (LOP and LON pins) can be used to apply an

external 2× LO (that is, bypass internal PLL) to the IQ

modulator. A differential LO drive of 0 dBm is recommended.

The LO port can also be used as an output where a 2× LO or

1× LO can be brought out and used to drive another mixer.

The nominal output power provided at the LO port is 3 dBm.

The mode of operation of the LO port is determined by the

status of the LOSEL pin (3.3 V logic) along with the settings

in a number of internal registers (see Table 10).

Table 10. LO Port Configuration1, 2

LON/LOP

Function

LOSEL

Register 5,

Bit DB5

(LDIV)

Register 5,

Bit DB4

(LXL)

Register 5,

Bit DB3

(LDRV)

Input (2× LO)

0

X

1

0

Output (Disabled)

0

X

0

Output (1× LO)

0

1

Output (1× LO)

1

0

Output (1× LO)

1

0

1

Output (2× LO)

0

1

0

1

Output (2× LO)

1

0

Output (2× LO)

1

0

1

1 X = don’t care.

2 LOSEL should not be left floating.

The internal VCO of the device can also be bypassed. In this

case, the charge pump output drives an external VCO through

the loop filter. The loop is completed by routing the VCO into

the device through the LO port.

RESERVED

MOD

BIAS

ENABLE

RF

OUTPUT

ENABLE

LO

OUTPUT

DIVIDER

LO

IN/OUT

CONTROL

LO

OUTPUT

DRIVER

ENABLE

DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8

DB7

MBE

DB6

DB5

DB4

DB3

DB2 DB1 DB0

0

RFEN

LDIV

LXL

LDRV

C3(1) C2(0) C1(1)

LDRV

0

1

LDIV

0

1

DIVIDE BY 1

DIVIDE BY 2 (DEFAULT)

LO OUTPUT DRIVER

ENABLE

DRIVER OFF (DEFAULT)

DRIVER ON

RFEN

0

1

DISABLE

ENABLE (DEFAULT)

RF OUTPUT ENABLE

LO OUTPUT DIVIDE MODE

CONTROL BITS

LXL

0

1

LO OUTPUT (DEFAULT)

LO INPUT

LO INPUT/OUTPUT CONTROL

MBE

0

1

DISABLE

ENABLE (DEFAULT)

MOD BIAS ENABLE

00

0

000

0

Figure 46. Register 5—LO Path and Modulator Control Register Map

Numéro de pièce similaire - ADRF6703

Fabricant	No de pièce	Fiches technique	Description
Analog Devices	ADRF6703	1Mb / 36P	400 MHz to 1250 MHz Quadrature Modulator REV. 0
	ADRF6703	1Mb / 36P	2050 MHz to 3000 MHz Quadrature Modulator REV. 0
	ADRF6703	1Mb / 36P	1200 MHz to 2400 MHz Quadrature Modulator REV. B

More results

Description similaire - ADRF6703

Fabricant	No de pièce	Fiches technique	Description
Analog Devices	ADRF6702	1Mb / 36P	1200 MHz to 2400 MHz Quadrature Modulator with 1550 MHz to 2150 MHz Frac-N PLL REV. 0
	ADRF6702ACPZ	1Mb / 36P	1200 MHz to 2400 MHz Quadrature Modulator with 1550 MHz to 2150 MHz Frac-N PL REV. B
	ADRF6603	504Kb / 24P	2100 MHz to 2600 MHz Rx Mixer with Integrated Fractional-N PLL and VCO REV. 0
	ADRF6701	1Mb / 36P	400 MHz to 1250 MHz Quadrature Modulator REV. 0
	ADL5385	1Mb / 26P	30 MHz to 2200 MHz Quadrature Modulator REV. B
	ADRF6750ACPZ-R7	1Mb / 40P	950 MHz to 1575 MHz Quadrature Modulator REV. A
	ADL5372ACPZ-R7	809Kb / 24P	1500 MHz to 2500 MHz Quadrature Modulator REV. 0
	AD8349	969Kb / 28P	700 MHz to 2700 MHz Quadrature Modulator REV. 0
	ADL5372	809Kb / 24P	1500 MHz to 2500 MHz Quadrature Modulator REV. 0
	ADL5374	862Kb / 20P	3000 MHz to 4000 MHz Quadrature Modulator REV. 0

More results

ADRF6703 Fiches technique(PDF) 26 Page - Analog Devices

ADRF6703 Fiches technique(HTML) 26 Page - Analog Devices

Numéro de pièce similaire - ADRF6703

Description similaire - ADRF6703

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Fiches technique Télécharger

Lien URL