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BYC10600 Fiches technique(PDF) 6 Page - Fairchild Semiconductor |
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BYC10600 Fiches technique(HTML) 6 Page - Fairchild Semiconductor |
6 / 15 page AN-6982 APPLICATION NOTE © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com Rev. 1.0.0 • 6/8/10 6 Design Considerations In this section, a design procedure is presented using the schematic in Figure 13 as reference. A 350W PFC power supply application with universal input range is selected as a design example. The design specifications are summarized in Table 1. Table 1. Design Specifications Brownout Protection Line Voltage 72VAC Line Voltage Range 85~264VAC AC Input Voltage Frequency fline = 50 ~ 60Hz Nominal PFC output voltage VBOUT = 387V Minimum PFC Output Voltage During Holdup Time 310V Hold-up Time tHLD = 20ms Rated Output Power POUT = 350W Efficiency η = 0.94 Switching Frequency fSW = 65KHz PFC Inductor Ripple Current Maximum ∆IL is 50% of Average Inductor Current at Full Load PFC Output Voltage Ripple 12VPP IEA RT/CT RDY EN VRMS ISENSE IAC SGND OPFC PGND VDD VREF FBPFC VEA FAN6982 Range Enabled/Disabled VEN =VVREF : Enabled VEN = GND : Disabled AC Input F1 CIF2 LBOOST DBOOST CBOOST Q1 RCS RRMS1 RRMS2 RRMS3 CRMS1 CRMS2 RLF CLF RIAC RIC CIC1 CIC2 D1 D2 RDRV RPL CDD RFB2 CFB RFB1 RVC CVC1 CVC2 RT CT CREF REN CRDY vCC VBOUT Downstream DC/DC Converter PWM Controller Q2 Rreg1 Rreg2 Rreg3 VOUT From Standby Auxiliary Power Supply CIF1 Figure 13. Reference Circuit for Design Example |
Numéro de pièce similaire - BYC10600 |
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Description similaire - BYC10600 |
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